Xilinx FMC XM105 User Manual page 14

Chapter 1: XM105
14
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Table 1-3: VITA 57.1 FMC HPC Connections (Cont'd)
FMC Schematic Net
HPC Pin Name
C2
C3
No Connect
C6
C7
C10 FMC_LA06_P
C11 FMC_LA06_N
C14 FMC_LA10_P
C15 FMC_LA10_N
C18 FMC_LA14_P
C19 FMC_LA14_N
C22 FMC_LA18_CC_P
C23 FMC_LA18_CC_N
C26 FMC_LA27_P
C27 FMC_LA27_N
C30 IIC_SCL_MAIN
C31 IIC_SDA_MAIN
C34 GA0
C35 VCC12
C37 VCC12
C39 VCC3V3
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Breakout
FMC
Signal to
HPC Pin
Connector
D1
D4
Not Used
D5
D8 FMC_LA01_CC_P
D9 FMC_LA01_CC_N
D11
J1, P1
D12
D14
D15
D17
J1
D18
D20 FMC_LA17_CC_P
D21 FMC_LA17_CC_N
J20
D23
D24
EEPROM,
Si570
D26
EEPROM D27
D29
D30
D31
D32
D33
D34
D35
D36
D38
D40
FMC XM105 Debug Card User Guide
Breakout
Schematic Net
Signal to
Name
Connector
PG_C2M
No Connect Not Used
J1, P1
FMC_LA05_P
FMC_LA05_N J1, P1
FMC_LA09_P
FMC_LA09_N
FMC_LA13_P
FMC_LA13_N
J1
FMC_LA23_P
FMC_LA23_N
J20
FMC_LA26_P
FMC_LA26_N
FMC_TCK
FMC_TDI J5
FMC_TDO
VCC3V3_AUX
FMC_TMS J5
No connect
GA1 EEPROM
VCC3V3
VCC3V3
VCC3V3
UG537 (v1.2) September 24, 2010