Cirrus Logic CRYSTAL LAN CS890 Technical Reference Manual page 31

;PALASM Design Description
;---------------------------------- Declaration Segment ------------
TITLE High address decoder PATTERN
REVISION
AUTHOR Deva Bodas
COMPANY Crystal Semiconductor
DATE 04/01/1994
CHIP _decoder PAL16R4
;--------------------------------- PIN Decl a rations ---------------
PIN 1 SCLK
PIN 2 CS_EL_b
PIN 3 SDATA
PIN 4 ALE
PIN 5 LA23
PIN 6 LA22
PIN 7 LA21
PIN 8 LA20
PIN 9 RESET
PIN 11 OE
PIN 12 ADD_VALID COMB; When high, Q[23:20] are programmed
PIN 13 EQUALH
PIN 19 EQUALL
PIN 18 CHIPSEL_b
PIN 14 Q20
PIN 15 Q21
PIN 16 Q22
PIN 17 Q23
AN83REV1
; Serial clock from the CS8900 pin 4 (EESK)
; External Logic enable from the CS8900 pin 2 (ELCS*)
; Serial data in from the CS8900 pin 5 (EEDataOut )
; Address latch enable from the ISA bus
; Address 23
; Address 22
; Address 21
; Address 20
; ISA reset pin
; Output enable for the registered outputs
COMB; Upper 2 bits of address match
COMB; Lower 2 bits of address match
COMB; CHIPSEL* to the CS8900 pin 7
REG
REG
REG
REG
CS8900 Technical Reference Manual
31