Mitsubishi MELSEC-A Series Programming Manual page 36

Type acpu/qcpu-a (a mode)
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2. INSTRUCTIONS
Classi-
Instruction
fication
Symbol
SER
Date
search
SERP
SUM
SUMP
Bit
check
DSUM
DSUMP
DECO
DECOP
Decode
Encode
ENCO
ENCOP
7.seg-
ment
SEG
decode
BSET
BSETP
Bit set
reset
BRST
BRSTP
DIS
DISP
Accocia
-tion
Dissoci-
ation
UNI
UNIP
ASCII
conver-
ASC
sion
(4) Data processing instructions
Table 2.20 Date Processing Instructions
Symbol
Contents of Processing
(S1)
(S)
15
0
(S+1)
(S)
Decode from 8 to 256
(S)
Decode
n
Decode from 256 to 8
(S)
2
n
bits
Converts alphanumeric characters
into ASCII codes and stores into 4
points beginning with the
devices, D.
*1: For the number of steps when extension devices are used or when index qualification is performed to
bit devices for AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board, refer to Section 3.8.1.
*2: The
mark in the Index column indicates that index qualification can be performed with the AnA,
A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*3: The
mark in the Subset column indicates that subset processing can be performed with the A3H,
A3M, AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*1
Execu-
tion Con-
dition
(S2)
9
n
A0 : Coinciding number
9
A1 : Coinciding quantity
3
3
A0 : Quantity of 1
3
A0 : Quantity of 1
3
9
(D)
2
n
bits
9
9
Encode
(D)
n
9
7
7
7
7
9
9
9
9
9
13
2 − 20
MELSEC-A
Applicable CPU
!
!
*3
!
*3
!
!
!
!
!
!
!
*3
Not applicable to A3V.
!
!
!
!
!
!
!
!
!
Page
7-41
7-41
7-43
7-43
7-43
7-43
7-46
7-46
7-46
7-46
7-49
7-52
7-52
7-52
7-52
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7-54
7-54
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