Mitsubishi MELSEC-A Series Programming Manual page 29

2. INSTRUCTIONS
Classi- Instruction
fication Symbol
BCD
BCDP
BCD
conver-
sion
DBCD
DBCDP
BIN
BINP
BIN
conver-
sion
DBIN
DBINP
Classi- Instruction
fication Symbol
MOV
MOVP
Transfer
DMOV
DMOVP
CML
CMLP
Nega-
tion
transfer
DCML
DCMLP
(3) BCD ↔ BIN conversion instructions
Table 2.12 BCD ↔ BIN Conversion Instructions
Symbol Contents of Processing
BCD conversion
(S)
BIN (0 to 9999)
BCD conversion
(S1+1, S1)
BIN (0 to 99999999)
BIN conversion
(S)
BCD(0 to 9999)
BIN conversion
(S1+1, S1)
BCD (0 to 99999999)
(4) Data transfer instructions
Table 2.13 Data Transfer Instructions (Continue)
Symbol Contents of Processing
(S) → (D)
(S+1, S) → (D+1, D)
(S) → (D)
(S+1, S) → (D+1, D)
*1: For the number of steps when extension devices are used or when index qualification is performed to
bit devices for AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board, refer to Section 3.8.1.
*2: The mark in the Index column indicates that index qualification can be performed with the AnA,
A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*3: The mark in the Subset column indicates that subset processing can be performed with the A3H,
A3M, AnA, A2AS, AnU, QCPU-A (A Mode) and A2USH board only.
*1
Execu-
tion Con-
dition
5
(D)
5
9
(D+1, D)
9
5
(D)
5
9
(D+1, D)
9
*1
Execu-
tion Con-
dition
5
5
7
7
5
5
7
7
2 − 13
MELSEC-A
Applicable CPU
!
!
*3
!
*3
!
!
!
!
!
Applicable CPU
!
!
!
!
!
!
!
!
Page
6-39
6-39
6-39
6-39
6-42
6-42
6-42
6-42
Page
6-47
6-47
6-47
6-47
6-49
6-49
6-49
6-49