National Instruments DAQ X Series User Manual page 91

To ensure this condition never occurs, NI-DAQmx adds a background channel for finite
acquisitions that have both an odd number of channels and an odd number of
samples-per-channel. The background channel is also added when performing any
reference-triggered finite acquisition. Data from the background channel is only visible
when reading in RAW mode.
For maximum efficiency in bus bandwidth and onboard FIFO use, use an even number of
samples-per-channel or an even number of channels for finite acquisitions, so the
background channel is not added.
Note (NI USB-634x/635x/636x Devices)
hardware-timed single point (HWTSP) operations.
© National Instruments
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
• Continuous acquisition refers to the acquisition of an
unspecified number of samples. Instead of acquiring a set
number of data samples and stopping, a continuous
acquisition continues until you stop the operation.
Continuous acquisition is also referred to as double-buffered
or circular-buffered acquisition.
If data cannot be transferred across the bus fast enough, the
FIFO becomes full. New acquisitions overwrite data in the
FIFO before it can be transferred to host memory. The device
generates an error in this case. With continuous operations, if
the user program does not read data out of the PC buffer fast
enough to keep up with the data transfer, the buffer could
reach an overflow condition, causing an error to be generated.
– Hardware-timed single point (HWTSP)—Typically, HWTSP
operations are used to read single samples at known time intervals.
While buffered operations are optimized for high throughput,
HWTSP operations are optimized for low latency and low jitter. In
addition, HWTSP can notify software if it falls behind hardware.
These features make HWTSP ideal for real time control
applications. HWTSP operations, in conjunction with the wait for
next sample clock function, provide tight synchronization
between the software layer and the hardware layer. Refer to the
NI Developer Zone document, NI-DAQmx Hardware-Timed
Single Point Lateness Checking, for more information. To access
this document, go to
ni.com/info
.
daqhwtsp
X Series USB devices do not support
4-45
Chapter 4 Analog Input
and enter the Info Code
X Series User Manual