Interrupt Initialization - Adaptec AHA-1740A Technical Reference Manual

adaptec
DMA Channel
0
5
6
7

Interrupt Initialization

This setup procedure is normally completed by the BIOS during initialization so that
no other activity is required. If modifications to the interrupt handler are required,
this information together with the programming information provided by the host
system should be sufficient to properly set up the interrupt vectors.
The host adapter will drive one of several interrupts in the AT system. The particu-
lar interrupt used must be set up on power-up initialization and be properly man-
aged during usage. A summary of the AT interrupts of interest to the host adapter
driver along with their corresponding vector locations follow. All of these interrupts
are handled by a slave interrupt controller. The master controller handles all system
interrupts such as keyboard, timer, etc. and is assumed to be correctly initialized to
allow interrupts by the slave controller. Upon receiving an interrupt, the processor
will be vectored to the contents of the corresponding vector location.
Hardware Interrupt
IRQ 9
IRQ 10
IRQ 11
IRQ 12
IRQ 14
IRQ 15
The interrupt is initialized by clearing the corresponding interrupt mask bit in the
slave controller. The mask register is a read/write register, and only the bit of inter-
est should be cleared. The port address is A1h, and bit definitions follow:
5-32
DMA Controller Port
Software Interrupt Vector Location (hex)
Note
IRQ 13 is not one that is available on this board.
AHA-1740A/1742A/1744
0B
0A
D6
D4
D6
D4
D6
D4
Int 71
Int 72
Int 73
Int 74
Int 76
Int 77
Data
0C
00
C1
01
C2
02
C3
03