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6.6 LCD Panel Voltage Setting
6.7 Monochrome LCD Panel Support
6.8 Color Passive LCD Panel Support
6.9 Color TFT/D-TFD LCD Panel Support
6.10 Power Save Modes
S5U13705B00C Rev 1.0 Evaluation Board
Rev. 3.1
The S5U13705B00C board supports both 3.3V and 5V LCD panels through the LCD
connector J5. The voltage level is selected by setting jumper J4 to the appropriate position.
Refer to Table 2-3: "Jumper Settings," on page 7 for setting this jumper.
Although not necessary for signal buffering, buffers have been implemented in the board
design to provide flexibility in handling 3 and 5 volt panels.
The S1D13705 directly supports 4 and 8-bit, dual and single, monochrome passive LCD
panels. All necessary signals are provided on the 40-pin ribbon cable header J5. The
interface signals on the cable are alternated with grounds to reduce crosstalk and noise.
Refer to Table 3-1: "LCD Signal Connector (J5) Pinout," on page 8 for specific connection
information.
The S1D13705 directly supports 4 and 8-bit, dual and single, color passive LCD panels. All
the necessary signals are provided on the 40-pin ribbon cable header J5. The interface
signals on the cable are alternated with grounds to reduce crosstalk and noise.
Refer to Table 3-1: "LCD Signal Connector (J5) Pinout," on page 8 for specific connection
information.
The S1D13705 directly supports 9 and 12-bit active matrix color TFT/D-TFD panels. All
the necessary signals can also be found on the 40-pin LCD connector J5. The interface
signals on the cable are alternated with grounds to reduce crosstalk and noise.
Refer to Table 3-1: "LCD Signal Connector (J5) Pinout," on page 8 for connection infor-
mation.
The S1D13705 supports hardware and software power save modes. These modes are
controlled by the utility 13705PWR. The hardware power save mode needs to be enabled
by 13705PWR and then activated by DIP switch S1-6. See Table 2-1: "Configuration DIP
Switch Settings," on page 6 for details on setting this switch.
Seiko Epson Corporation
Technical Description
15
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