USING THE ERROR AND STATUS REGISTERS
The SCPI error and status registers report many conditions, statuses and events into short numeric codes.
Momentary events may be latched so the remote computer can read about them at a later time. A "fan
out" architecture is used to summarize all the data into one Status Byte register.
The Genesys™ power supply, with the LAN option, does not support the service request event
defined in the Status Byte register.
There are three types of registers. Data, as in a bit is set high or low, flows top to bottom in the following
list. See Figure 7 for the diagram.
Condition Registers: contain bits that are set when a condition or error occurs. The bits are only cleared
when the condition or error is cleared. The contents may be read but not changed.
Enable Registers: individual bits may be set to allow the status and errors to be latched for reading even
after the status or error condition has cleared. The power-up default is all zeroes, that is, no latching occurs.
Event Registers: bits that are set when an event or error occurs. The bits are cleared when the contents of
the register are read or when a clear status command is sent..
11.8.4. Clear Status
This command resets the error, status and message registers in the LAN board. No power supply settings
are changed
The *CLS command will:
- Erase any response message in the output queue
- Erase any errors in the SYSTEM:ERROR queue
- Reset all event registers to zeroes
- Will not change any Enable or Condition register bits
Syntax:
*CLS
Query: This command has no query form
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