Decoder (Dvd Main Pcb) - Sony RDR-VX500 Service Manual

5-8 Decoder (DVD Main PCB)

1. 8V @ 3A
P3V3
REG U L AT O R
R5 6 P1V8
IC 206 4.7 K
R63 2 4
VIN VOUT
10K
1 5
SD SENSE
C58 C61 C59
+ +
470uF/10V LP3966ES
0. 1uF 470uF/10V
USE SINGLE POINT CONNECTION TO QUIET GND.
DO NOT USE ANT VIAS FOR CONNECTIONS.
PROVIDE 1 SQ. IN THERMAL PAD WITH NO
SOLDER MASK.
P3V3
[7] S Y S _RESET ~
Chang e Part Type( FB13, F B 20,F B 22,F B 21)
FB2 0
3225 to 2012
0(3216)
C 8 2 0 .1uF
C 8 3 0 .1uF
C 8 4 0 .1uF
C 8 5 0 .1uF
IC 202
1 54 MD 2 1
VDD1 VSS1
MD 3 1 2 53 MD 2 3 MD 2 0
DQ0 DQ15
3 52 MD 1 9
VDDQ1 VSSQ1
MD 3 0 MD 2 2 MD 1 8
4 51
DQ1 DQ14
MD 2 9 5 50 MD 2 1 MD 1 7
DQ2 DQ13
6 49 MD 1 6
VSSQ2 VDDQ2
MD 2 8 7 48 MD 2 0 MA10
DQ3 DQ12
MD 2 7 8 47 MD 1 9 MA9
DQ4 DQ11
MD 2 5
9 46
VDDQ3 VSSQ3
MD 2 6 10 45 MD 1 8 MD 2 6
DQ5 DQ10
MD 2 5 11 44 MD 1 7 MWE
DQ6 DQ9
12 43 S Y S _RESET ~
VSSQ4 VDDQ4
MD 2 4 13 42 MD 1 6 MD 2 7
DQ7 DQ8
14 41
VDD2 VSS2
DQM 3 15 40
LDQM NC
T_ MW E 16 39 DQM 2 MD 2 4
WE UDQM
MC A S L 17 38 T_MCKO MD 2 3
CAS CLK
MR A S L 18 37 MC KEH MA8
RAS CKE
19 36 MA7
CS NC
BS0 20 35 MA10 MA6
BA0 A11
BS1 MA9 MA5
21 34
BA1 A9
MAP 22 33 MA8 MA4
AP/A10 A8
MA0 23 32 MA7 MA3
A0 A7
MA1 24 31 MA6 MA2
A1 A6
MA2 25 30 MA5
A2 A5
MA3 MA4
26 29
A3 A4
27 28
VDD3 VSS3
R2 0 2
4S641632 OPEN
C 1 0 9 0 .1uF
C 1 1 0 0 .1uF NV_ C E ~
C 1 1 2 0 .1uF
C2 2 7
OPEN
P3V3
P3V3
Add R202,C 227 f or EM I Modif y
FB2 2
0(3216)
C 1 1 8 0 .1uF
C 1 1 9 0 .1uF
C 1 2 0 0 .1uF
C 1 2 1 0 .1uF
MA1
IC 204 MA3
MA4
1 54
VDD1 VSS1
MD 1 5 2 53 MD 7 MA7
DQ0 DQ15
3 52 MA9
VDDQ1 VSSQ1
MD 1 4 4 51 MD 6 MA10
DQ1 DQ14
MD 1 3 5 50 MD 5 MD 1 7
DQ2 DQ13
6 49
VSSQ2 VDDQ2
MD 1 2 7 48 MD 4 MD 2 0
DQ3 DQ12
MD 1 1 8 47 MD 3 MD 2 2
DQ4 DQ11
9 46 MD 2 3
VDDQ3 VSSQ3
MD 1 0 10 45 MD 2 MD 2 5
DQ5 DQ10
MD 9 11 44 MD 1
DQ6 DQ9
12 43
VSSQ4 VDDQ4
MD 8 MD 0
13 42
DQ7 DQ8
14 41 ROM D 1
VDD2 VSS2
DQM 1 15 40 ROM D 3
LDQM NC
T_ MW E 16 39 DQM 0
WE UDQM
MC A S L 17 38 T_MCKO ROM D 6
CAS CLK
MR A S L MC KEH ROM D 7
18 37
RAS CKE
19 36 R 1 1 0 10K
CS NC
BS0 20 35 MA10
BA0 A11
BS1 21 34 MA9 R 1 1 3 10K
BA1 A9
MAP 22 33 MA8 R 1 1 5 10K
AP/A10 A8
MA0 MA7 R 1 1 6 10K
23 32
A0 A7
MA1 24 31 MA6
A1 A6
MA2 25 30 MA5 MD 2 6
A2 A5
MA3 26 29 MA4 S Y S _RESET ~
A3 A4
27 28
VDD3 VSS3
4S641632
C 1 2 9 0 .1uF
C 1 3 0 0 .1uF
C 1 3 1 0 .1uF
V_ R _O U T
[7] V_R _O U T
Y _G_ OUT
[7] Y_ G _O U T
U_ B _O U T
[7] U_ B _O U T
[6] P C MO _L RCK
[6] PCM O _B C K
[6] P C MI O _XCLK
[4] C S 982_C LK
PCM O _D 0
[6] PCM O _D 0
[7] SP D IF _O U T
AD D C 99,C245, R38, R39
P3V3
for E MI M odif y
+ C6 2
47uF / 16V
P1V8
CORE_ V DD
FB1 3
S6
100XL/3A + C80
NC
47uF / 16V
1
PLL_VDD0
S Y S _RESET ~ 2
RSTB
R8 1 1 .5 K 3
TEST
IR _ I N
1 4
TP 6 IR_IN
ID E _IR Q 5
GPMS18
R 8 3 10K 6
GPMS19
ADD C100 f or E S D Modify 7
GPMS20
8
GPMS21
9
IO_VDD0
P3V3 DQM 3 10
DQM3
MD 3 1 11
MD31
MD 3 0 12
MD30
MD 2 9 13
RA24/MD29
C 8 6 0 .1uF C 8 7 0 .1uF 14
IO_VSS0
MD 2 8 15
RA23/MD28
MD 2 7
IC 203 16
RA22/MD27
MD 2 6 17
RA21/MD26
1 48 MD 2 2 MD 2 5 18
A15 A16 RA20/MD25
2 47 19
A14 BYTE IO_VDD1
3 46 MD 2 4 20
A13 VSS1 RA19/MD24
MA0 MD 2 3
4 45 21
A12 A-1/DQ15 RA18/MD23
5 44 ROM D 7 22
A11 DQ7 CORE_VDD0
6 43 MD 2 2 23
A10 DQ14 RA17/MD22
7 42 ROM D 6 C 9 5 0 .1uF 24
A9 DQ6 CORE_VSS0
8 41 C 9 6 0 .1uF 25
A8 DQ13 IO_VSS1
ROM D 5 MD 2 1
9 40 26
A19 DQ5 RA16/MD21
10 39 MD 2 0 27
A20 DQ12 RA15/MD20
11 38 ROM D 4 MD 1 9 28
WE DQ4 RA14/MD19
12 37 MD 1 8 29
RST VDD RA13/MD18
13 36 MD 1 7 30
A21 DQ11 RA12/MD17
14 35 ROM D 3 31
WP/ACC DQ3 IO_VDD2
15 34 MD 1 6 32
RY/BY DQ10 RA11/MD16
16 33 ROM D 2 DQM 2 33
A18 DQ2 DQM2
17 32 C 1 0 6 0 .1uF 34
A17 DQ9 IO_VSS2
18 31 ROM D 1 DQM 1 35
A7 DQ1 DQM1
19 30 MD 1 5 36
A6 DQ8 MD15
20 29 ROM D 0 MD 1 4 37
A5 DQ0 MD14
MAP MD 1 3
21 28 38
A4 OE MD13
22 27 MD 1 2 39
A3 VSS0 MD12
23 26 MD 1 1 40
A2 CE MD11
24 25 MA1 41
A1 A0 IO_VDD3
MD 1 0 42
MD10
C 1 0 7 0 .1uF
43
IO_VSS3
C 1 0 8 0 .1uF 44
29DL323
CORE_VSS1
MD 9 45
R19 2 MD9
R 9 4 10K 46
CORE_VDD1
0R
FL_ C S ~ MD 8 47
MD8
MD 7
48
MD7
MD 6 49
MD6
MD 5 50
MD5
MD 4 51
MD4
C 1 1 3 0 .1uF 52
IO_VSS4
MD 3 53
MD3
JP 1 54
IO_VDD4
MD 2 55
MD2
MD 1 56
MD1
FB2 1 Y I N 0 57
VIN_D0
0(3216) Y I N 1 58
VIN_D1
Y I N 2 59
VIN_D2
Y I N 3
60
VIN_D3
C1 1 7
C 1 1 6 0 .1uF
47uF /16V
CN201
1 2 MA0
GND0 A0
3 4 MA2
A1 A2
5 6
A3 GND1
7 8 MA5
A4 A5
MA6
9 10
GND2 A6
11 12 MA8
A7 A8
13 14
A9 GND3
15 16 MD 1 6
A10 A11
17 18 MD 1 8
A12 A13
19 20 MD 1 9
GND4 A14
21 22 MD 2 1
A15 A16
23 24
A17 GND5
25 26 MD 2 4
A18 A19
27 28
A20 A3V3
29 30
B3V3 GND6
31 32
GND7 C3V3
ROM D 0
33 34
D3V3 D0
35 36 ROM D 2
D1 D2
37 38 ROM D 4
D3 D4
39 40 ROM D 5
GND8 D5
41 42
D6 GND9
R 1 0 9 10K
43 44
D7 D8
45 46 R 1 1 1 10K
D9 D10
47 48 R 1 1 2 10K
GND10 D11
49 50 R 1 1 4 10K
D12 D13
51 52
D14 GND11
MWE
53 54
D15 WE
55 56 MAP Add R201, C 226 f or EM I Modif y
GND12 OE
57 58 NV_ C E ~
A21 CE
59 60
RST GND13
YIN[7:0] [2 ,4 ]
5-19
IC201
CS98202
240LQFP
R 1 0 7
C2 2 6
OPEN
C 1 3 2 0 .1uF
HEADER 5x
I2 C D EBUG
VCC P3V3
AD C _B C K [ 2,6]
P C MI_L RCK [ 2 ,4 ]
P C MI_D A T A [2,4]
IO _R XD [7]
IO_TXD [7]
IO _C LK [7 ]
P3V3
R1 7 3 1 K
HM_RDY [2]
H M_W R ~ [2]
HM _RD~ [2 ]
V ID _P3V3 P3V3
H M_C S 3 [2]
FB9
0(2012)
SM _HIUIN T ~ [2 ]
DV_AV_SE L [4 ]
D A C -3V3_VD D
AMUTE~ [7]
FB10
0(2012)
+ C2 3 1 + C23 0
Install Resister when 47uF /16V 47uF /16V
new DMA function Works.
(R 73)
D A C _1V8_VD D P1V8
FB12
0(2012)
+
C2 3 2
47uF /16V
Add C 231 fo r N oise Reduction
180
PLL_VDD2
179 1
GPD3 TP 4
178 1
GPD2 TP 5
R8 2 2 2 R
177
HM_ALE H M_ALE[2]
176
HM_A3
175
GPD1
174
GPD0 A N A L O G _RST~ [4 ,5 , 6 ]
173
HM_A2
172
HM_A1
171 C 8 1 0 .1uF
CORE_VSS4
170
HM_A0
169
CORE_VDD4
168
GPD16
167
DAC_RAIL_VDD0
166
DAC_GUARD_VDD0
C 8 8 0 .1uF
165
DAC_GUARD_VSS0
164
DAC_ANA_VDD3
163 R5 1 5 .1 K
DAC_ANA_VSS3
162 C 8 9 0 .1uF
VREF_YC
161 R 8 5 180 R
ISET_YC
C 9 0 0 .1uF
160
COMP_YC
159 C 9 1 0 .1uF
DAC_ANA_VSS2
158
DAC_ANA_VDD2
157
YC_OUT
156
DAC_ANA_VSS1
155
DAC_ANA_VDD1
154
Y_OUT
153 C 9 7 0 .1uF
DAC_ANA_VSS0
152
DAC_ANA_VDD0
151
C_OUT
150 C 1 0 4 0 .1uF
DAC_SUB_VSS0
149 R9 2 2 .2 K
DAC_WELL_VDD0
148 C 1 0 5 0 .1uF
DAC_RAIL_VSS0
147
GPD20 S M_H RESET~
146 A T A PI_0_RST~
GPD19
145
GPD18
144 R9 3 0 R
GPD17 SM _HIUIN T ~
H M_D 15 H M _D [15:0]
143
HM_D15
H M_D [15:0]
142 H M_D 14
HM_D14
141 H M_D 13 D o n ot I nstall Resister when
HM_D13
140 H M_D 12
new DMA function Works.
HM_D12
139 H M_D 11
HM_D11 ( R 93)
H M_D 10
138
HM_D10
137 HM _ D 9
HM_D9
136 HM _ D 8
HM_D8
135 HM _ D 7
HM_D7
134 HM _ D 6
HM_D6
HM _ D 5
133
HM_D5
132 C 1 1 1 0 .1uF A T A PI_0_RST~
IO_VSS10
131
V I N_ CL K [ 2 ,4 ]
VIN_CLK
130
IO_VDD9
129
HM_CS5
128
HM_CS4
127 HM _ D 4
HM_D4
126 HM _ D 3
HM_D3
125 HM _ D 2 DM A R Q _H
HM_D2
124 HM _ D 1 D MACK_L
HM_D1
123 HM _ D 0
HM_D0
122 C 1 1 4 0 .1uF
IO_VSS9
C 1 1 5 0 .1uF HM _W R ~
121
PLL_VSS0
R3 1 ADD R3 1,C 101 HM _RD~
OPEN H M _ RDY
for E MI M odif y
ID E _ IR Q
HM _A 1
C1 0 1 HM _A 0
OPEN HM _C S 0
D V _A V _SEL~ [4]
IO_ RRQ
IO_ RRQ [7 ]
IO _S R Q
I O _S R Q [7]
VCC
Install Resister when
10K
new DMA function Works.
(R 95, R 96)
VCC
CN203
R 1 0 8 10K
4
3 R209 100 R
2
R208 100 R
1
HDR1X 4 SHRD
MS _IDAT [ 4 ,6 ]
MS _IC L K [4,6]
P3V3
C 1 2 8 0 .1uF
C N 204
I C 205
1 2
3 4
1 8
5 6 A0 VDD
2 7
7 8 A1 WE
3 6 R 1 2 1 100 R
9 10 A2 SCL
4 5 R 1 2 2 100 R
VSS SDA
2 -2 MM
PORT
524AB0X91
5-20
Chang e Part Type( FB 9,F B 10,F B 12)
3225 t o 2012
VCC
IO _R X D
IO_TXD
IO _C LK R181 1K
IO _R D Y
HM _A 2
HM _A 1
HM _A 0
C V BS_OUT
C V BS_OUT [7 ]
Y_ O U T
Y _ O U T [7]
C_ O U T
C _O U T [7]
[2]
[2 ]
[2 ]
CN202
1 2
HM _ D 7 3 4 HM _ D 8
HM _ D 6 5 6 HM _ D 9
HM _ D 5 7 8 H M_D 10
HM _ D 4 9 10 H M_D 11
HM _ D 3 11 12 H M_D 12
HM _ D 2 13 14 H M_D 13
HM _ D 1 15 16 H M_D 14
HM _ D 0 17 18 H M_D 15
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36 HM _A 2
37 38 HM _C S 1
39 40
VCC