Pioneer PDP-5050SX Service Manual page 202

1
MBM29PL3200BE70PFV (MAIN BOARD ASSY : IC7152)
A
• Page Mode Flash Memory
Block Diagram
12, 18, 28,
V
CC
58, 63, 73
17, 27, 33,
V
SS
64, 74, 79
86
WE
B
82
DW/W
87
WP
88
ACC
80
CE
81
OE
C
57-51, 40-34,
A ~ A
19 2
11-8
A , A
1 0 7, 6,
78
(A )
- 1
D
Pin Function
No.
57-51, 40-34, 11-6, 78 A
19
78-75, 72-65, 62-59,
DQ
32-19, 26-19, 16-13
80 CE
OE
81
E
86 WE
82 DW/W
87 WP
88 ACC
17, 27, 33, 64, 74, 79 V
SS
12, 18, 28, 58, 63, 73 V
CC
1-5, 41-50,
N.C.
83-85, 89, 90
F
202
1
2
Control
Circuit
(Command
Register)
Write Circuit
Low Vcc DET. Write / Erase
Circuit Pulse Timer
Pin Name I/O
- A , A I Address input
0 -1
- DQ I/O Data input/output
31 0
I Chip enable
I Output enable
I Write enable
I 16 bit, 32 bit mode switch
I Write protect
I Acceleration
−
Ground
−
Power supply
−
No connection
2
3
Erase Circuit
Chip Enable
Output Enable
Circuit
Y Decoder
STB
X Decoder
Pin Function
PDP-5050SX
3
4
DQ ~ DQ
31 0
Input/Output
Buffer
STB
Data Latch
Y Gate
33,554,432
Cell Matrix
4