Pioneer PDP-5050SX Service Manual page 178

1
SII169CTG100 (DIGITAL VIDEO ASSY: IC4202)
A
• Receiver IC
Pin Arrangement (Top view)
QO2 51
QO3 52
QO4 53
B
QO5
54
QO6 55
QO7 56
OVCC 57
OGND 58
QO8 59
QO9 60
QO10
61
QO11 62
QO12 63
QO13
64
QO14 65
QO15 66
VCC 67
GND 68
C
QO16 69
QO17 70
QO18
71
QO19 72
QO20 73
QO21
74
QO22 75
D
Block Diagram
SCLS
E
SDAS
RXC ±
RX0±
RX1±
RX2±
EXT_RES
F
178
1
2
CONTROLS
SiI 169
100-pin TQFP
(Top View)
DIFFERENTIAL SIGNALS
Registers
--------------
Configuration Logic
2
I C
Slave
PanelLink
24
TM
TMDS
/
encrypted
Digital
data
Core
PDP-5050SX
2
3
EVEN 8-bits RED
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
PLL
HDCP
Decryption
Engine
24
XOR
/
Mask
Interface
unencrypted
data
control
3
4
QE13
QE12
QE11
QE10
QE9
QE8
OGND
OVCC
QE7
QE6
QE5
QE4
QE3
QE2
QE1
QE0
9 PDO#
8 SCDT
7 STAG_OUT
6 VCC
GND
5
4 PIXS
3 SDA
2 PD#
1 RESET#
HDCP
Keys
E EPROM
CTL3
QE[23:0]
QO[23:0]
Panel
ODCK
Logic DE
HSYNC
VSYNC
SCDT
4