Pioneer PDP-5050SX Service Manual page 198

1
SII9993CTG100 (MAIN BOARD ASSY : IC6881)
A
• HDCP Panel Link Receiver
Pin Arrangement (Top view)
B
OVCC
OGND
OGND
OVCC
C
RESET#
RSVDL
CSCL
CSDA
Block Diagram
D
72
RESET#
76
DSDA
77
DSCL
81
E EXT_RES
83,84
RXC±
86,87
RX0±
RX1± 91,92
RX2± 96,97
F
198
1
2
Q13
51
Q12
52
Q11
53
Q10
54
Q9
55
56
57
Q8
58
Q7
59
Q6
60
Q5
61
Q4
62
Q3
63
64
VCC
65
GND
66
67
Q2
68
Q1
69
Q0 70
INT
71
72
73
74
75
INT
71
I2C REGISTERS
SLAVE
CONFIGURATION
LOGIC BLOCK
HDCP HDCP
KEYS DECRYPTION
EEPROM ENGINE
XOR
MASK
PANEL LINK
TM
TMDS
CONTROL SIGNALS
DIGITAL CORE
CONTROL SIGNALS
2
3
I2C
SLAVE
AUX DATA
LOGIC
BOARD
AUDIO
DATA
DECODE
LOGIC
MODE
BOARD
CONTROL
VIDEO
COLOR
SPACE
CONVERTER
UP/DOWN
SAMPLING
PDP-5050SX
3
4
PLLOUT
25
PLLIN
24
PVCC2
23
22 PGND2
21 OVCC
20 RSVDO
RSVDO
19
18 RSVDL
17 VCC
16 GND
15 AnBPb
14 DACVCCB
13 DACGNDB
12 AnGY
11 DACVCCG
10 DACGNDG
9 RSET
8 COMP
7 AnRPr
6 DACVCCR
5 DACGNDR
N/C
4
3 N/C
2 DACGND
1 DACVCC
75 CSDA
74 CSCL
MCLK
26 MCLKOUT
GEN
27 MCLKIN
32 SCK
31 WS
30 SDO
29 SPDIF
35 DE
33 HSYNC
34 VSYNC
46 ODCK
36-39,42-44,48-55,
Q[23-0]
58-63,68-70
12 AnGY
VIDEO
7 AnRPr
DAC
15 AnBPb
9 8
RSET COMP
4