8-Bit Timer/Event Counter Configuration - NEC mPD789026 Subseries User Manual

7.2 8-Bit Timer/Event Counter Configuration

The 8-bit timer/event counter consists of the following hardware configuration.
Item
8 bits × 1 (TM00)
Timer counter
Compare register: 8 bits × 1 (CR00)
Register
Timer output 1 (TO0)
Control register 8-bit timer mode control register 00 (TMC00)
Port mode register 5 (PM5)
f
X
5
f /2
X
TI0/P50/TO0
2
(1) 8-bit compare register 00 (CR00)
This is an 8-bit register to compare the value set to CR00 with the 8-bit timer register 00 (TM00) count
value, and if they match, generates an interrupt request (INTTM0).
CR00 is set with an 8-bit memory manipulation instruction. The 00H to FFH values can be set.
RESET input makes CR00 undefined.
Caution Before rewriting CR00, stop the timer operation.
operation is enabled, the coincidence interrupt request signal may be generated
immediately.
(2) 8-bit timer counter 00 (TM00)
This is an 8-bit register to count pulses.
TM00 is read with an 8-bit memory manipulation instruction.
RESET input clears TM00 to 00H.
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CHAPTER 7 8-BIT TIMER/EVENT COUNTER
Table 7-3. Configuration of 8-Bit Timer/Event Counter 00
Figure 7-1. Block Diagram of 8-Bit Timer/Event Counter 00
8-Bit Compare Register 00
(CR00)
Match
8-Bit Timer Counter 00
(TM00)
Selector
TCE00 TCL001 TCL000 TOE00
User's Manual U11919EJ3V0UM00
Configuration
Internal Bus
F/F
Clear
8-Bit Timer Mode Control Register 1
Internal Bus
If CR00 is rewritten while the timer
P50
PM50
Output Latch
INTTM0
TO0/P50/TI0