Software Implementation - Atmel AT32UC3 Series Application Note

7. Software Implementation

Hall A
Hall B
Hall C
Timer Counter
Environment Layer
HARDWARE Layer
AVR32710
14
Figure 7-1. Block diagram
PWM
HALL_ESTIMATOR
GPIO task #2
(Section 5.4)
Prescalor
tick
(Section 5.3)
This application is based on a loop regulation.
• The timer counter generates an interrupt based on a clock reference. This reference named
tick is prescaled to generate the period regulation .
• The hall_estimator computes the motor position from the GPIO inputs and the motor speed
from tick reference value.
• The period_regulation_task computes a new value of amplitude from the last value of
amplitude and a new motor speed value each period regulation clock.
• The SVPWM uses the motor_position and the amplitude to update all duty cycles. These
new duty cycles values are used to update the PWM channel duty cycle.
Periodically, the amplitude is updated with:
=
AMPLITUDE ( K
p
PERIOD_REGULATION_TASK
task #1
amplitude
SVPWM
computation
task #2
(Section 5.2)
period_regulation
SOFTWARE Layer
× −
) ( Speed Speed
reference feedback
∫
+ × −
) ( K ) ( Speed
I reference
UH(Q1)
UL(Q2)
YH(Q3)
YL(Q4)
ZH(Q5)
ZL(Q6)
Environment Layer
Speed )
feedback
32094B–AVR32–05/09