Connectors Description; Lvds + Backlight Connector; Pin Signal - Seco SBC-C23 User Manual

With nxp i.mx6solox processor
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3.3 Connectors description

3.3.1

LVDS + backlight connector

SBC-C23 board can be interfaced to LCD displays using its LVDS interface, which allows the connection of displays with a colour depth of 18 or 24 bit, single
channel.
LVDS connector - CN3
Pin
Signal
Pin
Signal
1
GND
2
LVDS0_TX0-
3
I2C1_SCL
4
LVDS0_TX0+
5
I2C1_SDA
6
GND
7
GND
8
LVDS0_TX1-
9
+5V
10
LVDS0_TX1+
LCD
11
+5V
12
GND
LCD
13
+3.3V
14
LVDS0_TX2-
LCD
15
+3.3V
16
LVDS0_TX2+
LCD
17
NVCC_3V0
18
GND
19
LVDS_BLT_EN
20
LVDS0_CLK-
21
TOUCH_INT
22
LVDS0_CLK+
23
TOUCH_RST
24
GND
25
GND
26
LVDS0_TX3-
27
V
28
LVDS0_TX3+
IN
29
V
30
GND
IN
LVDS0_CLK+/LVDS0_CLK-: LVDS Channel #0 differential Clock.
LVDS_BLT_EN: NVCC_3V0 electrical level Output with a 10kΩ pull-down resistor, Panel Backlight Enable signal. It can be used to turn On/Off the backlight's lamps
of connected LVDS display.
I2C1_SCL: I2C Bus clock line. Bidirectional signal, electrical level NVCC_3V0 with a 10kΩ pull-up resistor. It is managed by i.MX6 processor's I2C1 controller.
I2C1_SDA: I2C Bus data line. Bidirectional signal, electrical level NVCC_3V0 with a 10kΩ pull-up resistor. It is managed by i.MX6 processor's I2C1 controller.
TOUCH_INT: Touch Screen IRQ line, NVCC_3V0 electrical level with a 10kΩ pull-up resistor.
TOUCH_RST: Touch Screen Reset signal, NVCC_3V0 electrical level with a 10kΩ pull-down resistor.
SBC-C23
SBC-C23 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: S.B. - Reviewed by L.B. -Copyright © 2020 SECO S.p.A.
For the connection, a connector type HR A1014WVB-S-2x15P or equivalent (2 x 15p, male, straight, P1, low
profile, polarized) is provided, with the pin-out shown in the table below.
Mating connector: HR A1014H-2X15P with HR A1014-T female crimp terminals.
On the same connectors, are also implemented signals for direct driving of display's
backlight: voltages (VIN, +5V
and +3.3V
LCD
LVDS_BLT_EN).
V
voltage, available on pins 27-29, is the Power Voltage that is supplied to the board though
IN
DC Jack CN1 or Power in connector CN76 (+12V
+5V
is derived from VCC_SW power rail. +3.3V
LCD
switched on and off via SW.
When building a cable for connection of LVDS displays, please take care of twist as tight as possible differential
pairs' signal wires, in order to reduce EMI interferences. Shielded cables are also recommended. Here following
the signals related to LVDS management:
LVDS0_TX0+/LVDS0_TX0-: LVDS Channel #0 differential data pair #0.
LVDS0_TX1+/LVDS0_TX1-: LVDS Channel #0 differential data pair #1.
LVDS0_TX2+/LVDS0_TX2-: LVDS Channel #0 differential data pair #2.
LVDS0_TX3+/LVDS0_TX3-: LVDS Channel #0 differential data pair #3.
) and control signals (Backlight enable signal,
LCD
is supported).
DC
is derived from 3V3_ALW power rail. Both voltages are
LCD
22

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