Broadcom P411W-32P User Manual page 10

P411W-32P PCIe 4.0 User Guide
Table 1 Sideband Signal Pinout (Continued)
Connector Connector
A Side B Side
A12 A30
B8 B26
B9 B27
B10 B28
B11 B29
B12 B30
The following table describes the UBM pin settings. For the adapter to properly recognize the backplane, the BP_TYPE pin
must be set to 1. The adapter skips configuration if the BP_TYPE pin is 0, and the firmware logs a message to report that
an unrecognized backplane exists on the connector.
Table 2 Sideband Management Pin Settings
Pin Name
BP_TYPE 0: SGPIO (not supported)

1: 2-Wire

2W_RESET# 0: Reset is asserted

1: Reset is not asserted

REFCLK+/-
2W_CLK
2W_DATA
PERST# 0: Reset is asserted

1: Reset is not asserted

C_TYPE,
D_INPL#,
CHANGE_DET#
Broadcom
Sideband or Vendor
Specific Pin Number
– REFCLK-
0 2W_CLK
1 2W_DATA
2 GND
5 PERST#
6 C_TYPE, D_INPL#, CHANGE_DET# Input/Output 10 kΩ pull-up
Settings
Backplanes must be set to the two-wire interface when using the P411W-32P NVMe
switch adapter. SGPIO is not supported.
Optional reset driven by the host if the UBM target reports that the target can be reset.
— PCIe REFCLK HCSL 100-MHz clock driven by the device side ports to PCIe devices
that require REFCLK.
If D_INPL# is 0, the adapter enables the REFCLK outputs for that quad of high-speed
lanes.
When the UBM Clock Routing bit on the backplane is 0, this output is turned off.
— The two-wire interface clock signal.
— The two-wire interface data signal.
The adapter drives the PCIe RESET# signal.
This signal uses a clamp to ground so that the signal on the adapter powers up LOW
until backplane detection warrants the release of this signal for open-drain use. This
method ensures that PERST# does not deassert until the directly connected NVMe
drive is successfully detected.
— Open collector/drain input or output signal.



UBM Assignments
C_TYPE. Because BP_TYPE is 1, this signal adheres to the SFF-8448
requirement to drive this signal to 1 in response to floating the signal. Because this
signal is an open drain signal, 'driving' to 1 is when a pull-up resistor pulls this signal
HIGH.
D_INPL#. Because this signal is an open collector and the adapter floats this signal
HIGH, the backplane pulls this signal to ground to indicate an NVMe device is
connected and a two-wire interface backplane management target might be on the
sideband's two-wire interface.
CHANGE_DET#. If D_INPL# is 0 and a UBM FRU device is discovered on the
two-wire interface, the UBM FRU data can inform the adapter that the device is
CHANGE_DET# feature capable. The adapter can rely on this signal as the
CHANGE_DET# signal as described in the UBM specification. In this mode, the
UBM controller drives this signal LOW to assert CHANGE_DET#.
Direction Resistor Value
Output —
Input/Output 4.75 kΩ pull-up
Input/Output 4.75 kΩ pull-up
— —
Output 1.0 kΩ pull-up
Description
NVMe Switch Adapter
P411W-32P-UG104
10