CoreLayout - Calrec TYPE R Installation Manual

CORE LAYOUT
TheUR6500TypeRcoreisdesigned
toprovidetheDSP,Routing&
Controlforuptothreeconsoles.In
additionithasabaselevelofI/Oand
GPIOandoneortwooptionalAoIP
interfacedevicesfittedinternally
allowingalargeamountofstream
connectivitywithotherAoIPdevices.
Theimagebelowshowsthefrontand
backviewsoftheTypeRcoreunit.
Thefrontofthecoredisplaysontheleft
handsidetheLEDsignalstatusindicators
fortheAnalogueandAESinputsand
outputs.Inadditionthe48Vphantom
powerLEDstatusindicatorsforthe
analogueinputsandtheSRCLEDstatus
indicatorsareshown.
Ontherighthandsideareshownthe
AoIPLEDstatusindicatorsandafurther
columnofSystemLEDstatusindicators
andtotherightofthesearetwo6.35mm
(1/4")headphonesocketsformonitoring
usage.NexttotheseareanEthernet
SetupportandUSBconnector.
TheSetupportisusedtoconfigurethe
CorewhilsttheUSBconnectorisused
torecover/reinitialisethecoresystem
fromaUSBmemorystickintheeventof
connectionfailure.Atthefarrightisa
Resetswitchwhichrestartstheprocessor
withoutalteringanystoredsettings.
Therearofthecoreisarrangedintoatop
rowandabottomrow.
UR6500 TYPE R CORE - FRONT AND BACK VIEWS
60 TYPE R
Radio Production System
Thetoprowcontainstheexternalsystem
connectionswhichfromlefttorightare:-
AoIP1andAoIP2RJ45interfaceswhich
areconnectedtointernallyfittedoptional
US6493AoIPdevices(withredundant
PrimaryandSecondaryconnections).
Eachofthesedevicescanprovideupto
256channelsofstreamedaudioineither
direction.Nexttotheseareasetare4
BNCconnectorslabelledSync1/2Inand
1/2Out.ThesearediscussedintheSync
section.
TotherightoftheBNCconnectorsare
asecondaryUSBconnectorandablock
of8RJ45connectorswhichconnectto
thevarioussurfacesviaPoE+switches.
Typicallyeachoftheseconnecttoa
separatePoE+switchinterfacingtoa
numberofFader,LSPandSSPpanels.
Morethanoneconnectionisusuallymade
toeachconsoleareatoprovidecontrol
diversity.Forinstancea24faderconsole
maybepoweredfromtwoPoE+switches
connectedbacktothecore,witheach
switchpoweringanddatatransferring
to/from2xIM6413faderpanelsand2x
MU6411LargeSoftPanels.
FurthertotherightisaDVIdebugport
whichisreservedfordevelopmentuse
alongwithaPRI/SECswitch.
ThebottomrowisdedicatedtoI/O,GPIO
andPower.Thereare4x25way'D'Type
connectorscarryingaudiousingAES59/
Tascam®pinoutformatandtheaudiois
alsocarriedaspairsofAnalogueinputs
oroutputsorAESI/Oportson4xRJ45
connectorsper25way'D'typeconnector.
Thefourconnectorareasfromlefttoright
provide:-8Mic/LineAnalogueinputs
withphantompower,8AnalogueLine
Outputs,4AESInputportswithSRCand
4AESOutputports.
Furthertotherightare4xRJ45
connectorsforGPIOinterfacing.
Theuppertwoconnectorseachprovide
6xGPIoptoinputcircuitseachandthe
lowertwoconnectorsprovides6xGPO
optooutputcircuitseach.
Onthebottomrowofthecoreare2xIEC
powersocketslabelledPSU1andPSU2,
eitherofwhichcanpowertheconsole.
Togethertheyprovidepowerredundancy.
TheIECinputsshouldbefedfrom
separateACsourcestoprotectagainst
externalpowerloss.Intheeventthatonly
oneACoutletisavailable,powershould
befedviaanIECY-Splitcabletoprovide
redundancyagainstinternalPSUfailure.
Metalclipsprovideretentiontofurther
protecttheIECconnectorsfromworking
loose.Theseclipsfitsnugaroundlarge
IECconnectorswithscrewinterminals
insideforwiring.Theclipsmaynotprovide
adequateretentionontheirownforsome
pre-fabricatedIECconnectortypes.If
thereisconcernovertheconnectors
workinglooseduringtransit,we
recommendthatIECsocketswithbuiltin
latchingareused.
System Elements