Lock Detect With Phase Offset; Register Map; Reg 00H Chip Id (Read Only) Register - Infinite Pasternack PE11S100 Series User Manual

User Manual | PE11S100X Series Synthesizer

6.4 Lock Detect with Phase Offset

When operating in fractional mode the linearity of the charge pump and phase detector are more critical
than in integer mode. The phase detector linearity is worse when operated with zero phase offset. Hence
in fractional mode it is necessary to offset the phase of the reference and the VCO at the phase detector.
In such a case, for example with an offset delay, as shown in
always occur after the reference. The lock detect circuit window can be made more selective with a fixed
offset delay by setting lkd_win_asym_enable and lkd_win_asym_up_select
offset can be in advance of the reference by clearing lkd_win_asym_up_select while leaving
lkd_win_asym_enable
select is Reg 1A h<11>.

7.0 Register Map

7.1 Reg 00h Chip ID (Read Only) Register

Bit Type
[23:0] Ro Chip ID
20
Figure 9. Normal Lock Detect Window
Reg 19 h<10> set. lkd_win_asym_enable is
Figure 10. Delayed Lock Detect Window
Name Default
581502h
Figure 10, the mean phase of the VCO will
(Reg 1A
Reg 1A
Description
Chip ID
h<11>). Similarly the
h<10>, lkd_win_asym_up_
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