Pfd Lock Detect - Infinite Pasternack PE11S100 Series User Manual

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T
In this example the jitter contribution of the phase noise calculated previously would add only 0.764psec
more jitter at the reference, hence we see that the jitter at the phase detector is dominated by the fractional
modulation.
Bottom line, we have to expect about ±0.8 ns of normal variation in the phase detector arrival times when
in fractional mode. In addition, lower VCO frequencies with high reference frequencies will have much larger
variations. For example, a 1 GHz VCO operating at near the minimum nominal divider ratio of 36, would,
according to (EQ 4), exhibit about ±4 ns of peak variation at the phase detector, under normal operation.
The lock detect circuit must not confuse this modulation as being out of lock.

6.3 PFD Lock Detect

pfd_lkd_en
(Reg
01h<11>) enables the lock detect functions of the Internal PLL.
The Lock Detect circuit in the Internal PLL places a one shot window around the reference. The one shot
window may be generated by either an analog one shot circuit or a digital one shot based upon an internal
ring oscillator timer. Clearing lkd_ringosc_mono_select
'analog' window of fixed length, as shown in Figure 3. Setting lkd_ringosc_mono_select will result in a
variable length 'digital' widow.
The digital one shot window is controlled by lkd_ringosc_cfg
window period is then generated by the number of ring oscillator periods defined in lkd_monost_duration
Reg 1A
h<18:17>. The lock detect ring oscillator may be observed on the GPO2 port by setting ringosc_
testmode
(Reg 1A
h<19>) and configuring the gpo_sel<3:0> = 0111 in
function when this test mode is enabled.
lkd_wincnt_max
(Reg 1A
inside the lock detect window to declare lock. If for example we set lkd_wincnt_max = 1000 , then the VCO
arrival would have to occur inside the selected lock widow 1000 times in a row to be declared locked. When
locked the Lock Detect flag ro_lock_detect
window will result in clearing the Lock Detect flag, ro_lock_detect.
The Lock Detect flag ro_lock_detect
The Lock Detect flag is also output to the LD pin according to lkd_to_sdo_always
lkd_to_sdo_automux_en
the Lock Detect flag on LD. Clearing lkd_to_sdo_always and setting lkd_to_sdo_automux_en will display
the Lock Detect flag on LD except when a serial port read is requested, in which case the pin reverts
temporarily to the Serial Data Out pin, and returns to the lock detect function after the read is completed.
© 2019 Infinite Electronics, Inc. Pasternack is a registered trademark of Infinite Electronics, Inc.
+
=
T
2
(T
j
j ∑pk
jpn
3
h<9:0>) defines the number of consecutive counts of the VCO that must land
(Reg
(Reg
1Fh<0>) is a read only register, readable from the serial port.
(Reg 1A
h<12>), both in Table 28. Setting lkd_to_sdo_always will always display
)
2
(Reg 1A
h<14>) will result in a nominal ±10 ns
(Reg 1A
h<16:15>). The resulting lock detect
1Fh<0>) will be set. A single occurrence outside of the
(EQ 5)
Reg 1B
h. Lock detect does not
(Reg 1A
h<13>) and
19

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