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If you reload the count register during counting, the new count will be
loaded on the next CLK pulse. The count will be inhibited while the
GATE input is low.
The counter will start counting after the rising edge of the trigger input
and will go low for one clock period when the terminal count is
reached. The counter is retriggerable.
Before you write the initial count to each counter, you must first
specify the read/write operation type, operating mode and counter
type in the control byte and write the control byte to the control
register (BASE+15).
Since the control byte register and all three counter read/write registers
have separate addresses and each control byte specifies the counter it
applies to (by SC1 & SC0), no instructions on the operating sequence
are required. Any programming sequence following the 8254 conven-
tion is acceptable.
There are three types of counter operation: read/load LSB, read/load
MSB and read/load LSB followed by MSB. It is important that you
make your read/write operations in pairs and keep track of the byte
order.
The 8254 counter read-back command lets you check the count value,
programmed mode and current states of the OUT pin and Null Count
flag of the selected counter(s). You write this command to the control
word register. Format is as shown at the beginning of the chapter.
The read-back command can latch multiple counter output latches.
Simply set the CNT bit to 0 and select the desired counter(s). This
single command is functionally equivalent to multiple counter latch
commands, one for each counter latched.
Chapter 8 Programmable counter/timer
55
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