Advertisement
Two read-only registers at BASE+0 and BASE+1 hold A/D conver-
sion data. The 12 bits of data from the conversion are stored in
BASE+1 bit 7 to bit 0 and BASE+0 bit 7 to bit 4. BASE+0 bits 3 to 0
store the source A/D channel number.
Bit
D7
Value
AD3
Bit
D7
Value
AD11
AD11 to AD0
C3 to C0
You can trigger an A/D conversion from software, the card's on-board
pacer or an external pulse. Bits 1 and 0 of register BASE+9 (shown
on page 34) select the trigger source. If you select software trigger-
ing, a write to the register BASE+0 with any value will trigger an
A/D conversion.
D6
D5
D4
AD2
AD1
AD0
D6
D5
D4
AD10
AD9
AD8
Analog to digital data.
AD0 is the least significant bit (LSB) of the A/D
data, and AD11 is the most significant bit (MSB).
A/D channel number from which the data is derived.
C3 is the MSB and C0 is the LSB.
D3
D2
C3
C2
D3
D2
AD7
AD6
Chapter 4 Register structure and format
D1
D0
C1
C0
D1
D0
AD5
AD4
29
Advertisement
