C Pin Bypass Capacitor; Power Supply Decoupling - Fujitsu ALL FR 460 Series Application Note

Table of Contents

2.3 C Pin bypass capacitor

The following example shows the recommended connection for VDD5R/VSS and VCC18C.

100n

GND

Note: To reduction of EMI noise, the Bypass capacitor should be connected at first to VSS5

and then with the GND plane. Anyway the feedback line of Bypass capacitor should

be routed through VSS pin.

The following routing and placement for single sided metal layer is recommended (Note, that

in all following illustrations the mounting metal layer is drawn in black and the back side metal

layer in gray):

The following routing and placement for double-sided metal layer is recommended. Note, that

despite the capacitor is placed on the opposite side as the MCU, this solution is the best.

DeCaps for power supply have to be placed within the "current flow". Otherwise they are

senseless, because then their function become inoperable. The following graphic illustrates

this:

MCU-AN-300033-E-V15

FR460 Hardware Set Up

Chapter 2 Layout and Electromagnetic Compatibility

internal

VCC18C

VDD5R

voltage

regulator MCU

Vss

- 10 -

1.8V stabilization

to internal core

4.7IF..10IF

(ceramic X7R)

Bypass

Please use 4.7IF

...10IF capacitor

(ceramic X7R),

the capacitance value

depends on the used

max. PLL speed.

Please refer to the DS

Table of Contents