Related Manuals for Intel IQ80960RM
Summary of Contents for Intel IQ80960RM
- Page 1 IQ80960RM/RN Evaluation Platform Board Manual September 1998 Order Number: 273160-003...
- Page 2 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
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Page 3: Table Of Contents
Installing Software Development Tools ................2-1 Hardware Installation .........................2-2 2.3.1 Battery Backup ......................2-2 2.3.2 Installing the IQ80960RM/RN Platforms in the Host System........2-2 2.3.3 Verify IQ80960RM/RN Platform is Functional ..............2-2 Creating and Downloading Executable Files ................2-3 2.4.1 Sample Download and Execution Using GDB960............2-3 Hardware Reference........................3-1... - Page 4 CPU Counter/Timers .........................4-5 Primary PCI Interface ........................4-5 Secondary PCI Interface ......................4-5 DMA Channels ..........................4-6 Application Accelerator Unit ......................4-6 Performance Monitor Unit......................4-7 MON960 Support for IQ80960RM/RN .....................5-1 Secondary PCI Bus Expansion Connectors ................5-1 MON960 Components .......................5-1 5.2.1 MON960 Initialization ....................5-1 5.2.2 80960JT Core Initialization ...................5-2...
- Page 5 Figures IQ80960RM/IQ80960RN Platform Functional Block Diagram ...........1-1 IQ80960RN Platform Physical Diagram ..................1-2 LED Register Bitmap .........................3-8 ® i960 RM/RN I/O Processor Block Diagram................4-1 IQ80960RM/RN Platform Memory Map ..................4-2 ® i960 RM/RN I/O Processor Interrupt Controller Connections ..........4-4 ® i960 RM/RN I/O Processor DMA Controller ................4-6 Application Accelerator Unit.......................4-7...
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Page 7: Introduction
64-bit primary PCI and secondary PCI buses while the 80960RM utilizes both a 32-bit primary and secondary PCI bus. The IQ80960RM and IQ80960RN platforms are full-length PCI adapter boards and are 8.9” in height to accommodate four standard PCI connectors on the secondary PCI bus. -
Page 8: Iq80960Rn Platform Physical Diagram
Introduction Figure 1-2. IQ80960RN Platform Physical Diagram 64-Bit Secondary PCI Slots 168-Pin SDRAM DIMM Socket RS-232 Serial Port Flash Memory CR3 CR4 CR5 JTAG Port ® i960 NiCd Batteries Logic Analyzer Connectors 64-Bit PCI IQ80960RM/RN Evaluation Board Manual... -
Page 9: I960 ® Rm/Rn I/O Processor And Iq80960Rm/Rn Features
I/O subsystem. The IQ80960RM and IQ80960RN platforms allow the developer to connect PCI devices to the i960 RM/RN I/O processors using the four secondary PCI expansion connectors. The features of the IQ80960RM and IQ80960RN platforms are enumerated below and shown in... -
Page 10: Ixworks Software Development Toolset
O components. A variety of windows display source code, registers, locals, stack frame, memory and so on. WindSh allows you to communicate to the IQ80960RM/RN platform via an RS-232 serial port. The IQ80960RM/RN platform supports port speeds from 300 to 115,200 bps. The shell can be used to: •... -
Page 11: Ctools Software Development Toolset
1.4.1.3 Host Debugger Interface (HDI) Method You may use a source-level debugger, such as Intel’s GDB960 and GDB960V to establish serial or PCI communications with the IQ80960RM/RN platform. The MON960 Host Debugger Interface (HDI) provides a defined messaging layer between MON960 and the debugger. For more information on this interface, see the MON960 Debug Monitor User’s Manual (484290). -
Page 12: About This Manual
This chapter also describes Intel’s software development tools, the MON960 Debug Monitor, IxWORKS, software installation, and hardware configuration. Describes the locations of connectors, switches and LEDs on the IQ80960RM Chapter 3, “Hardware and IQ80960RN platforms. Header pinouts and register descriptions are also Reference”... -
Page 13: Notational-Conventions
Courier font Indicates code examples and file directories and names. Asterisks (*) On non-Intel company and product names, a trailing asterisk indicates the item is a trademark or registered trademark. Such brands and names are the property of their respective owners. -
Page 14: Technical Support
IQ80960RM and IQ80960RN technical assistance. See Section 1.7.2. Within the United States and Canada you may contact the Intel Technical Support Hotline. See Section 1.7.1 for a list of customer support sources for the US and other geographical areas. 1.7.1 Intel Customer Electronic Mail Support ®... -
Page 15: Related Information
Introduction 1.7.3 Related Information To order printed manuals from Intel, contact your local sales representative or Intel Literature Sales (1-800-548-4725). Table 1-1. Document Information Product Document Name Company/ Order # Developers’ Insight CD-ROM Intel # 273000 ® i 960 RM/RN I/O Processor Developer’s Manual... -
Page 17: Getting Started
Getting Started This chapter contains instructions for installing the IQ80960RM/RN platform in a host system and, how to download and execute an application program using Wind River System’s IxWorks∗ or Intel’s CTOOLS software development toolsets. Pre-Installation Considerations This section provides a general overview of the components required to develop and execute a program on the IQ80960RM/RN platform. -
Page 18: Hardware Installation
Follow the host system manufacturer’s instructions for installing a PCI adapter. The IQ80960RM/RN platform is a full-length PCI adapter and requires a PCI slot that is free from obstructions. The IQ80960RM/RN platform is taller than specified in the PCI Local Bus Specification Revision 2.1. -
Page 19: Creating And Downloading Executable Files
During a download, MON960 checks the link address stored in the ELF file, and stores the file at that location on the IQ80960RM/RN platform. If the executable file is linked to an invalid address on the IQ80960RM/RN platform, MON960 aborts the download. -
Page 21: Hardware Reference
IQ80960RM/RN platforms are shown in Table 3-1 Table 3-2. The numbers do not include the power required by a PCI card(s) mounted on one or more of the IQ80960RM/RN platforms’ four expansion slots. Table 3-1. IQ80960RN Platform Power Requirements Voltage... -
Page 22: Sdram Performance
Hardware Reference 3.2.1 SDRAM Performance The IQ80960RM/RN platform uses 72-bit SDRAM with ECC or 64-bit SDRAM without ECC. SDRAM allows zero data-to-data wait state operation at 66 MHz. The memory controller unit ® (MCU) of the i960 RM/RN I/O processor supports SDRAM burst lengths of four. A burst length of four enables seamless read/write bursting of long data streams, as long as the MCU does not cross the page boundary. -
Page 23: Upgrading Sdram
DIMM socket. The various memory combinations are shown in Table 3-4. Only 168-pin +3.3V SDRAM modules with or without ECC rated at 10 ns should be used on the IQ80960RM/RN platform. The column labeled ECC determines if that particular memory configuration can be used with ECC. -
Page 24: Console Serial Port
Hardware Reference Console Serial Port The console serial port on the IQ80960RM/RN platform, based on a 16C550 UART, is capable of operation from 300 to 115,200 bps. The port is connected to a phone jack-style plug on the IQ80960RM/RN platform. The DB25 to RJ-45 cable included with the IQ80960RM/RN can be used to connect the console port to any standard RS-232 port on the host system. -
Page 25: Interrupt And Idsel Routing
The i960 RM/RN I/O processor can be cooled by an active heat sink mounted on top. The fan provides a square wave output that is monitored by a comparator circuit on the IQ80960RM/RN platform. The frequency of the fan output is approximately 9K RPM. If the frequency falls below approximately 8K RPM the circuit will provide an interrupt to the processor. -
Page 26: Logic Analyzer Headers
Hardware Reference Logic Analyzer Headers There are five logic analyzer connectors on the IQ80960RM/RN platform. The connectors are Mictor type, AMP part # 767054-1. Hewlett-Packard and Tektronix manufacture and sell interfaces to these connectors. The logic analyzer connectors allow for interfacing to the SDRAM and ROM buses along with secondary PCI arbitration signals. -
Page 27: Jtag Header
JTAG Header The JTAG header allows debugging hardware to be quickly and easily connected to some of the IQ80960RM/RN processor’s logic signals. The JTAG header is a 16-pin header. A 3M connector (part number 2516-6002UG) is required to connect to this header. The pinout for the JTAG header is shown in Table 3-8. -
Page 28: User Leds
3.10 User LEDs The IQ80960RM/RN platform has a bank of eight user-programmable LEDs, located on the upper edge of the adapter board. These LEDs are controlled by a write-only register and used as a debugging aid during development. Software can control the state of the user LEDs by writing to the LED Register, located at E004 0000H. -
Page 29: Iq80960Rm/Rn Connectors And Leds
Hardware Reference Table 3-11 lists the connectors and LEDs. Table 3-11. IQ80960RM/RN Connectors and LEDs Item Description J1-J4 Secondary PCI bus expansion connector 168-pin SDRAM DIMM socket JTAG connector Serial port connector Logic analyzer connector for flash ROM bus Logic analyzer connector for Secondary PCI bus arbitration signals... -
Page 31: I960 ® Rm/Rn I/O Processor Overview
® i960 RM/RN I/O Processor Overview This chapter describes the features and operation of the processor on the IQ80960RM/RN ® platform. For more detail, refer to the i960 RM/RN I/O Processor Developer’s Manual. ® Figure 4-1. i960 RM/RN I/O Processor Block Diagram... -
Page 32: Cpu Memory Map
The memory map for the IQ80960RM/RN platform is shown in Figure 4-2. All addresses below 9002 0000H on the IQ80960RM/RN platform are reserved for various functions of the i960 RM/RN I/O processor, as shown on the memory map. Documentation for these areas, as well as the ®... -
Page 33: Local Interrupts
XINT4# and XINT5# on the i960 RM/RN I/O processor may be connected to interrupt sources external to the processor. On the IQ80960RM/RN platform, XINT4# is connected to the loss of fan detect and XINT5# is connected to the 16C550 UART. -
Page 34: I960 ® Rm/Rn I/O Processor Interrupt Controller Connections
Secondary PCI Bridge Interface Error Primary ATU Error Secondary ATU Error Memory Controller Unit Error DMA Channel 0 Error DMA Channel 1 Error DMA Channel 2 Error Messaging Unit Error Application Accelerator Unit Error NMI# (N/C) IQ80960RM/RN Evaluation Board Manual... -
Page 35: Cpu Counter/Timers
PCI bus. PCI cards are attached to the IQ80960RM/RN platform with a standard PCI connector and may contain up to four separate PCI devices. The i960 RM/RN I/O processor provides PCI-to-PCI bridge functionality to map installed PCI devices onto the host PCI bus, and supports transaction forwarding in both directions across the bridge. -
Page 36: Dma Channels
All three of the DMA channels connect to the i960 RM/RN I/O processor’s local bus and can be used to transfer data from PCI devices to memory on the IQ80960RM/RN platform. Support for chaining, and scatter/gather is built into all three channels. The DMA can address the entire 2 bytes of address space on the PCI bus and 2 bytes of address space on the internal bus. -
Page 37: Performance Monitor Unit
An event consists of a set of parameters which define a start condition and a stop condition. The monitored events are selected by programming an event select register (ESR). IQ80960RM/RN Evaluation Board Manual... -
Page 39: Mon960 Support For Iq80960Rm/Rn
PCI bus initialization including the establishment of a secondary PCI bus address map. Routines compatible with the PCI Local Bus Specification Revision 2.1 allow the software on the IQ80960RM/RN platform to search for devices on the secondary PCI bus and read and write the configuration space of those devices. -
Page 40: 80960Jt Core Initialization
Since the i960 RM/RN I/O processor Memory Controller is integral to the design and operation of the IQ80960RM/RN platform, the operational parameters for Bank 0 and Bank 1 are established immediately after processor core initialization. Memory Bank 0 is associated with the ROM on the IQ80960RM/RN platform. -
Page 41: Primary Pci Interface Initialization
Retries All Configuration Transactions Initializes When the IQ80960RM/RN is operating in Mode 0, the processor core is held in reset, allowing register defaults to be used on the Primary PCI interface. This mode is used to program the onboard Flash with either IxWORKS* or MON960. -
Page 42: Pci-To-Pci Bridge Initialization
(SOMWVR) is initialized to establish the translation value for Local-to-Secondary PCI accesses. The SOMWVR value is left at its default value of “0” to allow the IQ80960RM/RN platform to access the start of the PCI Memory address map. Likewise, the Secondary Outbound I/O Window Value Register (SOIOWVR) is left at its default value of “0”... -
Page 43: Mon960 Kernel
MON960 Support for IQ80960RM/RN MON960 Kernel The MON960 Kernel (monitor) provides the IQ80960RM/RN user with a software platform on which application software can be developed and run. The monitor provides several features available to the IQ80960RM/RN user to speed application development. Among the available features are: •... -
Page 44: Pci Bios Routines
MON960 Support for IQ80960RM/RN 5.4.2 PCI BIOS Routines MON960 includes PCI BIOS routines to aid application software initialization of the secondary PCI bus. The supported BIOS functions are described in the subsections that follow. sysPCIBIOSPresent sysFindPCIDevice sysFINDPCIClassCode sysGenerateSpecialCycle sysReadConfigByte sysReadConfigWord... -
Page 45: Sysfindpcidevice
MON960 Support for IQ80960RM/RN 5.4.2.2 sysFindPCIDevice This function returns the location of PCI devices that have a specific Device ID and Vendor ID. Given a Vendor ID, a Device ID, and an Index, the function returns the Bus Number, Device Number, and Function Number of the Nth Device/Function whose Vendor ID and Device ID match the input parameters. -
Page 46: Sysgeneratespecialcycle
( int bus_number, int special_cycle_data Return values: Since PCI Special Cycles are not supported by the IQ80960RM/RN platform, this function always returns FUNC_NOT_SUPPORTED. 5.4.2.5 sysReadConfigByte This function allows the caller to read individual bytes from the configuration space of a specific device. -
Page 47: Sysreadconfigword
MON960 Support for IQ80960RM/RN 5.4.2.6 sysReadConfigWord This function allows the caller to read individual shorts (16 bits) from the configuration space of a specific device. The Register Number parameter must be a multiple of two (i.e., bit 0 must be set to “0”). -
Page 48: Syswriteconfigbyte
MON960 Support for IQ80960RM/RN 5.4.2.8 sysWriteConfigByte This function allows the caller to write individual bytes to the configuration space of a specific device. Calling convention: int sysWriteConfigByte ( bus_number, device_number, function_number, register_number, /* 0,1,2,...,255 */ UINT8 *data Return values: This function returns SUCCESSFUL when the indicated byte was written correctly, or ERROR when there is a problem with the parameters. -
Page 49: Syswriteconfigdword
This function returns SUCCESSFUL when the indicated long was written correctly, or ERROR when there is a problem with the parameters. 5.4.2.11 sysGetIrqRoutingOptions The PCI Interrupt routing fabric on the IQ80960RM/RN platform is not reconfigurable (fixed mapping relationships); therefore, this function is not supported. Calling convention: int sysGetIrqRoutingOptions (... -
Page 50: Syssetpciirq
Primary PCI bus tests exercise the primary ATU, the PCI Doorbell unit, and the PCI DMA controller. Interrupts from both local and PCI sources are generated and handled. The PCI bus tests require an external test suite running on a PC to verify complete functionality of the IQ80960RM/RN platform. 5.5.2... -
Page 51: Bill Of Materials
Bill of Materials This appendix identifies all components on the IQ80960RN Evaluation Platform (Table A-1), and the IQ80960RM Evaluation Platform (Table A-2). Table A-1. IQ80960RN Bill of Materials (Sheet 1 of 4) Item Location Part Description Manufacturer Manufacturer Part #... - Page 52 R/SM 1/10 W 5% 22 ohm (0805) Dale CRCW0805220JT R/SM 1/10 W 5% 22 Kohm (0805) Dale CRCW0805223JT R/SM 1/10 W 5% 24 ohm (0805) Dale CRCW0805240JT R/SM 1/10 W 5% 2.4 Kohm (0805) Dale CRCW0805242JT IQ80960RM/RN Evaluation Board Manual...
- Page 53 822269-1 BT1, BT2, BT3, BT4, Battery Clips/PC/Snap-In/AA Keystone BT5, BT6, BT7, BT8 PALLV16V8Z-20JI PALLV16V8Z-20JI MEM Flash E28F016S5-090 TSOP Intel E28F016S5-090 BT1, BT2, BT3, BT4, Battery AA NiCd @ 600 mA/Hour SAFT NIC-AA-600-SAFT BT5, BT6, BT7, BT8 IQ80960RM/RN Evaluation Board Manual...
- Page 54 Resistor Pk SM RNC4R8P 30 ohm 742083300JTR Central Diode CMPSH3 Surface Mount CMPSH3 Semiconductor CR6, CR7 Diode SM / MBRS340T3 Motorola MBRS340T3 Central Diode/SM 1N4001 (CMR1-02) CMR1-02 Semiconductor SDRAM, DIMM, ECC, 2Mx72, 16 MB Unigen UG52S7408GSG IQ80960RM/RN Evaluation Board Manual...
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Page 55: Iq80960Rm Bill Of Materials
Bill of Materials Table A-2. IQ80960RM Bill of Materials (Sheet 1 of 4) Item Location Part Description Manufacturer Manufacturer Part # National IC/SM 74ALS32 SOIC-14 DM74ALS32M Semiconductor National IC/SM 74ALS04 SOIC DM74ALS04BM Semiconductor Texas IC/SM 74ABT273 SOIC SN74ABT273DW Instruments Texas... - Page 56 Bill of Materials Table A-2. IQ80960RM Bill of Materials (Sheet 2 of 4) Item Location Part Description Manufacturer Manufacturer Part # C1, C4, C5, C6, C7, C8, C9, C12, C13, C14, C15, C16, C17, C20, C21, C22, C23, C24, C25, C28,...
- Page 57 Bill of Materials Table A-2. IQ80960RM Bill of Materials (Sheet 3 of 4) Item Location Part Description Manufacturer Manufacturer Part # R/SM 1/10 W 5% 22 Kohm (0805) Dale CRCW0805223JT R/SM 1/10 W 5% 24 ohm (0805) Dale CRCW0805240JT R/SM 1/10 W 5% 2.4 Kohm (0805)
- Page 58 Bill of Materials Table A-2. IQ80960RM Bill of Materials (Sheet 4 of 4) Item Location Part Description Manufacturer Manufacturer Part # PALLV16V8Z-20JI PALLV16V8Z-20JI MEM Flash E28F016S5-090 TSOP Intel E28F016S5-090 BT1, BT2, BT3, BT4, Battery AA NiCd @ 600 mA/Hour SAFT...
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Page 59: Schematics
Decoupling and 3.3V Power Primary PCI Interface Memory Controller Flash ROM, UART, & LEDs Logic Analyzer I/F SDRAM 168-Pin DIMM Secondary PCI/960 Core Secondary PCI Bus 1/2 B-10 Secondary PCI Bus 3/4 B-11 SPCI Pull-ups B-12 Battery/Monitor IQ80960RM/RN Evaluation Board Manual... -
Page 71: Iq80960Rm Schematics List
Schematics Table B-2. IQ80960RM Schematics List Page Schematic Title B-14 Decoupling and 3.3V Power B-15 Primary PCI Interface B-16 Memory Controller B-17 Flash ROM, UART, & LEDs B-18 Logic Analyzer I/F B-19 SDRAM 168-Pin DIMM B-20 Secondary PCI/960 Core B-21... -
Page 83: Cpld Code
SCKE0.OE = !OUT0; //When OUT = 0, SCKE is grounded //When OUT = 1, SCKE is high impedance OUT1 = SCKE1.PIN & PRSTn # SCKE1.PIN & OUT1.PIN # !SCKE1.PIN & PRSTn; SCKE1 = 0; SCKE1.OE = !OUT1; IQ80960RM/RN Evaluation Board Manual... -
Page 85: Recycling The Battery
Recycling the Battery The IQ80960RM/RN platform contains four AA NiCd batteries. Each battery has the logo of the Rechargeable Battery Recycling Corporation (RBRC) stamped on it. The recycling fees have been prepaid on these batteries. Do not dispose of a rechargeable battery with regular trash in a landfill.
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