Phoenix Nubios Checkpoints; Table 6-2. Phoenix' Nubios Auxiliary Checkpoint Codes - RadiSys EPC - 6A Hardware Reference Manual

EPC-6A Hardware Reference
Code Description
05 DRAM initialization
06 DRAM 0- and F-page test
07 DRAM byte enable logic test
08 Copy ROM
09 Copy ROM
0A Copy ROM
0B Copy ROM
0C Copy ROM
0D Copy ROM
0E Clear 8042 interface
0F Reset 8042 interface
10 PC hardware initialization
11 Video interface initialization
12 Timer test
13 CMOS shutdown test
14 DMA test
15 DMA test
16 DMA page registers test
17 does not occur

Phoenix NuBIOS Checkpoints

The Phoenix
executed. Note that the execution order of the POST tests generally follows the order
listed in the tables below, but not exactly.
Beep code
1-2-2-3
1-3-1-1
36
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NuBIOS writes a number of checkpoints to I/O port 80h just before they are
™
Table 6-2. Phoenix NuBIOS Auxiliary Checkpoint Codes
™
Post code
02h
04h
06h
08h
09h
0Ah
0Bh
0Ch
0Eh
0Fh
11h
12h
14h
16h
18h
1Ah
1Ch
20h
Code Description
1C Interrupt controller test
1D Interrupt controller test
1E Battery level test
1F CMOS checksum test
20 Configuration byte initialization
21 Size system memory
22 System memory test
23 Stuck interrupt test
24 Stuck NMI (parity/IOCHK) bit test
25 Interrupt controller test
26 Size extended memory
27 Extended memory test
28 VME interface test
29 VXI register test
2A COM1 serial port test
2B COM2 serial port test
2C Cache test
Checkpoint description
Verify Real Mode
Get CPU type
Initialize system hardware
Initialize system controller registers with initial
POST values
Set in POST flag
Initialize CPU registers
Enable CPU cache
Initialize cache to initial POST values
Initialize I/O
Initialize localbus IDE
Load alternate registers with initial POST values
Jump to UserPatch0
Initialize keyboard controller
BIOS ROM checksum
8254 timer initialization
8237 DMA controller initialization
Reset Programmable Interrupt Controller
Test DRAM refresh