Interrupts; Watchdog Timer; Exmbus; Table 5-1. Interrupts - RadiSys EPC - 6A Hardware Reference Manual

Interrupts

The following table shows interrupt assignment.
Interrupt
NMI
IRQ0
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15

Watchdog Timer

EPC-6A contains a continually running timer having a period of approximately either 8
seconds or 250 milliseconds (software selectable). The watchdog timer event is generated
whenever the period expires. This event may be enabled as a source of the IRQ10 interrupt
or as a complete reset. The timer is reset to its maximum value by an I/O write to the
module status/control register.

EXMbus

The EXM bus, an I/O expansion bus, is provided on a connector to allow the user to insert
one EXMbus module. The EXMbus is very similar to the PC/AT ISA I/O bus. In addition,
it contains a signal -EXMID used for dynamic recognition and configuration of EXMs.
EXMs respond to one or more I/O addresses in the range 100h–107h only when their
–EXMID line is asserted. EXMs are required to return a unique EXM-type identification
byte in response to a read from I/O address 100h. Since the EPC-6A has only a single
EXM slot, its –EXMID line is wired as asserted.
Although IRQ11 is on the EXMbus, IRQ11 is also used by the reset/abort toggle switch
and is driven by a totem-pole driver that has no tristate. Thus the IRQ11 interruptIRQ11
interrupt is not available to EXM modules.
Further information on the EXMbus, its connectors, and standards for building EXMs is
available upon request.
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Table 5-1. Interrupts

Source
DRAM parity error, EXMbus I/O channel check
Timer (connected to R400 internal 8254 count 0 out)
Keyboard controller (R400 internal)
Cascade interrupt input
COM2 serial port
COM1 serial port
unassigned
unassigned/floppy disk
unassigned
Real-Time clock
unassigned
VME interrupt/event
front-panel toggle switch
not available
coprocessor (FERR)
unassigned/IDE
unassigned
Chapter 5: Theory of Operation
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