Flash Data Register (8383H); Sram Data Register 8384H); Led Register (8385H); Register State After Reset - RadiSys EPC - 6A Hardware Reference Manual

Flash Data Register (8383h)

Flash Data Register
This read/write register is used to access the byte in the flash memory array addressed by
the FS address registers. A read returns the value of the addressed byte if bit CDEN in the
memory control register is set; otherwise the read returns an unpredictable value. A write
to this register writes to the addressed byte if bit CDEN is set and if the flash write-protect
jumper is not installed on the board.

SRAM Data Register 8384h)

SRAM Data Register
This read/write register is used to access the byte in the nonvolatile SRAM array
addressed by the FS address register. The BIOS and ROM DOS use the upper 2 KB of the
SRAM array to communicate error messages to the setup program. Thus the user should
consider the SRAM as a 30 KB array.

LED Register (8385h)

LED Register
The LED register is a read/write register that controls the seven-segment display and reset
toggle switch on the front panel.
TLEDx These bits control the segments of the LED
seven-segment display as shown to the right. The
segment is lit when the corresponding bit is 0.
TSEN This bit controls both the decimal point on the LED
display and the front-panel toggle switch. When the
bit is 0, the decimal point is lit and the front-panel
switch is disabled. This bit can be used to prevent an
inadvertent reset from the front-panel switch.

Register State after Reset

A hardware reset of the EPC-6A (not a keyboard CTRL+ALT+DEL reset) clears all of the
register bits to 0, except for RELM, ARBM, ARBPRI, TSEN, and the registers at ports
8130 and 8151, which may be in an undefined state. (All bits, however, are cleared by a
power-on reset.)
The above is not apparent, however, because the BIOS initialization sequence stores
values in these register fields, largely as a result of the nonvolatile configuration
information specified in the setup screen.
The BIOS clears the interrupt and event enable registers.
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TSEN LED6 LED5 LED4
Appendix C: Registers
LED3 LED2 LED1 LED0
LED0
LED6
LED3
TSEN
61