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ov
1V
2V
32
------~
(SBIT x SBIT CHARACTER
BLOCKS)
32
(SBIT x SBIT
CHARACTER BLOCKS)
1 PLAYER
OH 1H 2H 3H 4H SH 6H 7H
l---+----4~-+--+~-+---t-~t--~
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4V
s v • •
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CHARACTER
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THE OUTPUT OF SHIFT REGISTER R3
Figure 3-11 Character Display Data
positions in which a character can be placed on the
playfield. In other words, for each position on the TV
monitor screen in which an 8 x 8 playfield character
can be displayed, there is an 8-bit data code stored at
a particular address in RAM, which determines what
character, if any, is to be displayed in that position.
The method by which the MPU writes the appro-
priate playfield data to each RAM location, and then
the horizontal and vertical timing signals read this
data out for actual video generation is known as
"cycle-sharing." The circuitry that controls this
cycle-sharing technique is composed of the three
Super Breakout
3-11
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