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Table 3-1
MPU Input/Output Signal Descriptions
Signal
Description/Function
Signal
Description/Function
D0-07
These eight lines are bi-directional data
are loaded into the MPU program
bus lines.
counter to point the start of a reset
AO-A15
These sixteen lines are unidirectional
routine.
MPU address lines to supporting
- -
memory (i.e., ROMs, RAMs) and 1/0.
NMI
This input line, while going low, indi-
--
cates a "non-maskable interrupt" to the
IRQ
This input, when low, indicates an
MPU. After the MPU concludes its
interrupt to the MPU. After
th.
e MPU
current instruction, it will then proceed
concludes its current instruction it will
to the NMI sequence.
proceed to the IRQ sequence.
<t>O
Clock input
- - -
RESET
When low, this input line resets the
<1>1, <1>2
Two-phase, non-overlapping MPU
MPU on either a "power-up condition"
or a Q
0
output of the watchdog counter.
clock outputs.
-
During the reset sequence prior to
R/W
This output is the read and write
RESET going high, the contents of two
signal line, which indicates the direction
locations (FFFC, FFFD) in memory
of data transfers on MPU data bus.
Table 3-2 Atari Inc. Programmed Memory Map
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NOTICE TO ALL PERSONS RECEIVING THIS DRAWING
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California.
Th is drawing is only conditionally
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Incor-
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.
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