Eeprom Map - Infineon TLE4997 User Manual

• "DSP off" switches off the signal processing unit (DSP). This bit has to be set prior to accessing the internal
register values via the interface (HCAL, TCAL, SCAL and EEPROM).
• "DSP stop" has to be set prior to switching the DSP off (as a separate command) before reading out the
calculated data HCAL, TCAL, and/or SCAL. This allows the DSP to finish the calculation of the current sample
and all values in the RAM are consistent.
• "DAC test" switches from the DSP DAC value to the DAC_SET value. This allows setting any DAC value
directly to measure the output voltage for a given DAC value for calibration proposes.
3.5

EEPROM Map

Figure 3-13 shows the content of the EEPROM registers.
ADDR Description
10 Parity of each column
H
IC lock high, USER,
11
H
clamping low
12 Clamping high value
H
13 Gain
H
14 Offset
H
15 TQ value, TT value
H
LP value, Range, TL
16
H
Value, IC lock low
17 Reserved
H
18 Reserved
H
19 Reserved
H
Figure 3-13 EEPROM Map of TLE4997 (all types).
The fields marked in red are configuration parameters for the sensor hardware. Those marked in yellow are used
by the DSP algorithms for signal processing. The purple fields are used to determine the condition of the
parameters by an external programming software (user defined) and the blue and cyan fields are parity bits for the
corresponding lines and columns used by the internal forward error correction (FEC). All parameters are unsigned
integer values. The reserved fields marked in white shall not be changed.
The functional description of the configuration and calibration parameters in the EEPROM map is given in
Chapter 4.
Parity Bits
The parity P of each column (including the precalibration ranges) is even for even bit positions (bit0=LSB, bit2,
c
bit4, ... bit14) and the parity P
line (address 0x10 ... 0x19) needs to be calculated so that the sum of its bits is always odd.
Note: Before accessing the EEPROM, the forward error correction (FEC) shall be disabled via the TEST register.
User's Manual
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
P P P P
l c c
P LH USER
l
P Reserved
l
P
l
P
l
TQ - quadratic temperature
P
l
coefficient (bit 7...0)
LP - low pass
P
l
(bit 0,2,1)
P
l
P
l
P
l
for all odd columns (bit1, bit3, ... bit15=MSB) is odd. The parity P
I
P P P P P
c c c c c
CL - Clamping low (bit 11...0)
CH - Clamping high (bit 11...0)
G - Gain (bit 14...0)
OS - Offset (bit 14...0)
R-Range TL - linear temperature coefficient (bit
(bit 1,0)
Reserved - do not modify
Reserved - do not modify
Reserved - do not modify
13
User's Manual
TLE4997 Programming
P P P P P
c c c c c
precal area - do not modify
TT - register (bit 6 ... 0)
8...0)
of every EEPROM
l
v01_01, 2019-08
TLE4997
P P
c c c
LL