Figure 1 Sp37 Opcode Map - Infineon SP37 Function Manual

Most Significant Nybble
0 1 2
NOP AJMP LJMP
0 page0 addr16
1/1
2/2 3/2
JBC ACALL LCALL
1
bit,rel page0 addr16
3/2 2/2 3/2
JB AJMP RET
2
bit,rel page1
1/2
3/2 2/2
JNB ACALL RETI
3
bit,rel page1
1/2
3/2 2/2
JC AJMP ORL
4
rel page2 dir,A
2/1
2/2 2/2
JNC ACALL ANL
5
rel page2 dir,A
2/2 2/2 2/1
JZ AJMP XRL
6
rel page3 dir,A
2/2 2/2 2/1
JNZ ACALL ORL
7
rel page3 C,bit
2/2*
2/2 2/2
SJMP AJMP ANL
8
rel page4 C,bit
2/2*
2/2 2/2
MOV ACALL MOV
9
page4 bit,C
DPTR ,#imm
3/2 2/2*
2/2
ORL AJMP MOV
A
C,bit page5 C,bit
2/1
2/2* 2/2
ANL ACALL CPL
B
C,bit page5 bit
2/2* 2/1
2/2
PUSH AJMP CLR
C
dir page6 bit
2/2* 2/1
2/2
POP ACALL SETB
D
dir page6 bit
2/2* 2/1
2/2
MOVX AJMP MOVX
E
page7
A,@DPTR A,@R0
1/2 1/2
2/2
MOVX ACALL MOVX
F
page7
@R0,A
@DPTR,A
1/2 1/2
2/2
Figure 1 SP37 OpCode Map
ROM Library Function Guide
Least Significant Nybble
3 4 5 6
RR INC INC INC
A A dir @R0
1/1 1/1 2/1 1/1
RRC DEC DEC DEC
A A dir @R0
1/1 1/1 2/1 1/1
RL ADD ADD ADD
A A,#imm A,dir A,@R0
1/1 2/1 2/1 1/1
RLC ADDC ADDC ADDC
A A,#imm A,dir A,@R0
1/1 2/1 2/1 1/1
ORL ORL ORL ORL
A,#imm A,dir A,@R0
dir,#imm
3/2
2/1 2/1 1/1
ANL ANL ANL ANL
A,#imm A,dir A,@R0
dir,#imm
3/2
2/1 2/1 1/1
XRL XRL XRL XRL
A,#imm A,dir A,@R0
dir,#imm
3/2
2/1 2/1 1/1
JMP MOV MOV MOV
A,#imm
dir,#imm
@A +DPTR @R0,#imm
1/2 3/2 2/1
2/1
MOVC DIV MOV MOV
AB dir,dir
dir,@R0
A,@A+PC
1/2 1/4 2/2*
3/2
MOVC SUBB SUBB SUBB
A,#imm A,dir A,@R0
A,@ A+DPTR
1/2
2/1 2/1 1/1
INC MUL MOV
DPTR AB
@R0,dir
1/4 /2*
1/2*
CPL CJNE CJNE CJNE
C
A,#imm A ,dir
@R0,#imm
1/1 3/2 3/2 3/2
CLR SWAP XCH XCH
C A A,dir A,@R0
1/1 1/1
2/1 1/1
SETB DA DJNZ XCHDA,
C A dir,rel @R0
1/1 1/1
3/2 1/1
MOVX CLR MOV MOV
A A,dir
A,@R1 A,@R0
1/2 1/1 1/1
2/1
MOVX CPL MOV
MOV
A dir,A
@R0,A
@R1,A
1/2 1/1 1/1
2/1
mnemonic
inst. length (bytes)
All mnemonics Copyright © 1980 Intel Corporation.
Tire Pressure Monitoring Sensor
7 8 9
INC INC INC
@R1 R0 R1
1/1 1/1 1/1
DEC DEC DEC
@R1 R0 R1
1/1 1/1 1/1
ADD ADD ADD
A,@R1 A,R0 A,R1
1/1
1/1 1/1
ADDC ADDC ADDC ADDC
A,@R1 A,R0 A,R1
1/1
1/1 1/1
ORL ORL ORL
A,@R1 A,R0 A,R1
1/1
1/1 1/1
ANL ANL ANL
A,@R1 A,R0 A,R1
1/1
1/1 1/1
XRL XRL XRL
A,@R1 A,R0 A,R1
1/1
1/1 1/1
MOV MOV MOV
R0,#imm R1,#imm R2,#imm
@R1,#imm
2/1 2/1 2/1
MOV MOV MOV
dir,R0 dir,R1 dir,R2
dir,@R1
2/2* 2/2*
2/2*
SUBB SUBB SUBB SUBB
A,@R1 A,R0 A,R1
1/1
1/1 1/1
MOV MOV
MOV
2 R0,dir R1,dir R2,dir
@R1,dir
2/2* 2/2*
2/2*
CJNE CJNE CJNE CJNE
R0,#imm R1,#imm R2,#imm
@R1,#imm
3/2 3/2 3/2
XCH XCH XCH
A,@R1 A,R0 A,R1
1/1
1/1 1/1
XCHD DJNZ DJNZ DJNZ
A,@R1 R0,rel R1,rel R2,rel
2/2
1/1 2/2
MOV MOV MOV
A,R0 A,R1
A,@R1
1/1 1/1
1/1
MOV MOV
MOV
R0,A R1,A
@R1,A
1/1 1/1
1/1
INC
addressing mode
DPTR
inst. cycles (* indicates optimzed)
1/2*
19
A B C D
INC INC INC INC
R2 R3 R4 R5
1/1
1/1 1/1 1/1
DEC DEC DEC DEC
R2 R3 R4 R5
1/1
1/1 1/1 1/1
ADD ADD ADD ADD
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
ADDC ADDC ADDC
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
ORL ORL ORL ORL
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
ANL ANL ANL ANL
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
XRL XRL XRL XRL
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
MOV MOV MOV MOV
R3,#imm R4,#imm R5,#imm
2/1 2/1 2/1 2/1
MOV MOV MOV MOV
dir,R3 dir,R4 dir,R5
2/2*
2/2* 2/2* 2/2*
SUBB SUBB SUBB
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
MOV MOV MOV MOV
R3,dir R4,dir R5,dir
2/2*
2/2* 2/2* 2/2*
CJNE CJNE CJNE
R3,#imm R4,#imm R5,#imm
3/2 3/2 3/2 3/2
XCH XCH XCH XCH
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
DJNZ DJNZ DJNZ
R3,rel R4,rel R5,rel
2/2
2/2 2/2 2/2
MOV MOV MOV MOV
A,R2 A,R3 A,R4 A,R5
1/1
1/1 1/1 1/1
MOV MOV MOV MOV
R2,A R3,A R4,A R5,A
1/1
1/1 1/1 1/1
Revision 1.0, 2011-12-15
SP37
Introduction
E F
INC INC
R6 R7
1/1 1/1
DEC DEC
R6 R7
1/1 1/1
ADD ADD
A,R6 A,R7
1/1 1/1
ADDC ADDC
A,R6 A,R7
1/1 1/1
ORL ORL
A,R6 A,R7
1/1 1/1
ANL ANL
A,R6 A,R7
1/1 1/1
XRL XRL
A,R6 A,R7
1/1 1/1
MOV MOV
R6,#imm R7,#imm
2/1 2/1
MOV MOV
dir,R6 dir,R7
2/2* 2/2*
SUBB SUBB
A,R6 A,R7
1/1 1/1
MOV MOV
R6,dir R7,dir
2/2* 2/2*
CJNE CJNE
R6,#imm R7,#imm
3/2 3/2
XCH XCH
A,R6 A,R7
1/1 1/1
DJNZ DJNZ
R6,rel R7,rel
2/2 2/2
MOV MOV
A,R6 A,R7
1/1 1/1
MOV MOV
R6,A R7,A
1/1 1/1