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t
ch
t
del
Figure 3-8 Frame Timing
Table 3-4
Electrical and Timing Specification of the Programming Interface
Parameter
V
clock high level
DD
V
clock low level
DD
OUT data out high level
OUT data out low level
OUT data in high level
OUT data in low level
OUT data input current
V
clock high time
DD
V
clock low time
DD
Data in setup time
Data in hold time
Data out settling time
Time between frames
Buffer off delay
Buffer on delay
1) capacity of external driver, especially during initial interface access (to overwrite ratiometric device output).
2) to reduce collisions with the ext. driver, it must be switched on slower than t
charge/discharge behaviour on V
3) to reach again a valid and stable ratiometric V
User's Manual
t
cl
t
t
su
hld
LSB
init
frame
Symbol
Min.
V
8.8
DD,CLKHI
V
4.8
DD,CLKLOW
V
V
- 2 –
O,OHIGH
DD
V
0
O,OLOW
V
3.0
O,IHIGH
V
-0.2
O,ILOW
I
-50
O
t
2.4
CH
t
1.6
CL
t
1.5
SU
t
2.3
HLD
t
–
SET
t
10.0
MIN
t
10.0
DEL
t
–
HLM
depends also on capacitive output load.
OUT
OUT
VDD
Vout
Values
Unit
Typ.
Max.
9.4
10
V
5
5.2
V
V
V
DD,CLKHI
–
2.0
V
V
V
+ 0.1
V
DD
DD
0.0
0.1
V
–
50
mA
50
100
µs
4.0
100
µs
2.0
–
µs
3.0
–
µs
1.0
1.7
µs
–
–
µs
25.0
–
µs
5.0
10.0
µs
signal state, please check the power-on time in the data sheet.
9
User's Manual
TLE4997 Programming
t
m in
t
t
hlm
set
MSB
data read
Note / Test Condition
specification of V
range does not apply to clock
OUT follows V
DD
1)
5k...250kBit/s
5k...250kBit/s
to rising V
DD
after rising V
DD
after rising V
DD
2)
2)3)
min. and switched off faster than t
DEL
TLE4997
t
set
LSB
frame
operating
DD
if 'high'
;
HLM max.
v01_01, 2019-08
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