Definition Of Terms; Reference Documents - Intel E7500 MCH Thermal Design Manual

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Intel E7500 and Intel
1.4

Definition of Terms

Table 1 lists the definitions of terms used in this document.
Table 1.

Definition of Terms

Term
BGA
ICH3-S
MBGA
MCH
FC-BGA
P64H2
T
case-nhs
T
die-nhs
T
die-hs
TDP
1.5

Reference Documents

Table 2 lists the reference documents and related document number or source.
Table 2.

Reference Documents

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Intel E7500, Intel
Design Guidelines
Low Voltage Intel
Thermal Design Guidelines
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Intel Xeon™ Processor MP Thermal Design Guidelines
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Intel PCI-64 Hub 2 (P64H2) Thermal Design Guidelines
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Intel 82801CA I/O Controller Hub 3 (ICH3-S) Datasheet
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Intel E7500 and Intel
Guide
Thermal Design Suggestions for Various Form Factors
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Intel E7500 Chipset MCH Thermal Testing Software
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Intel Xeon
6
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E7501 Chipsets MCH Thermal Design Guide
Definition
Ball Grid Array. A package type defined by a resin-fiber substrate, onto which a die is
mounted, bonded and encapsulated in molding compound. The primary electrical interface is
an array of solder balls attached to the substrate opposite the die and molding compound.
I/O Controller Hub. The chipset component that contains the primary PCI interface, LPC
interface, USB, ATA-100, and other legacy functions.
Mini Ball Grid Array. A version of the BGA with a smaller ball pitch.
Memory Controller Hub. The chipset component that contains the processor interface and
the memory interface.
Flip Chip Ball Grid Array. A packaging technology used for the Intel
chipset MCHs.
Bus Controller Hub. The chipset component that interfaces the PCI-X buses.
The maximum package case temperature without any package thermal solution. This
temperature is measured at the geometric center of the top of the package case.
The maximum die temperature without any package thermal solution. This temperature is
measured at the geometric center of the top of the package die.
The maximum die temperature with the reference thermal solution attached. This
temperature is measured at the geometric center of the top of the package die.
Thermal Design Power. Thermal solutions should be designed to dissipate this target power
level.
Document
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E7501, and Intel
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Xeon Processor for Embedded Applications
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E7501 Chipset Flotherm* Model and User's
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Processor Thermal Design Guidelines
E7505 Chipsets MCH Thermal
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E7500 and Intel
Document Number
298647
273764
298650
Contact your local Intel Representative
290733
Contact your local Intel Representative
Available at http://www.formfactors.org
Contact your local Intel Representative
298348
Thermal Design Guide
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E7501