Receiver Odt Configuration For Msio And Msiod Banks; Figure 57 Receiver Odt Configuration - Microsemi SmartFusion2 User Manual

I/Os
6.7.1

Receiver ODT Configuration for MSIO and MSIOD Banks

Libero SoC has the following settings for receiver ODT configuration.
• ODT Static
• ODT Impedance
6.7.1.1 ODT Static
There are two types of ODT static: ON and OFF.
• ON: The termination resistor for impedance matching is enabled in the chip. The value set to ODT
impedance is configured as parallel termination for the input or bidirectional buffers.
• OFF: The termination resistors for impedance matching are located on the printed circuit board.
6.7.1.2 ODT Impedance
When ODT static is ON, the valid ODT impedance values for the input or bidirectional buffers are chosen
from the I/O attribute editor. See
The ODT static and ODT impedance values can be set through the I/O attribute editor or the pdc file for
all the different I/O standards.
The following figure shows an example to set ODT static and ODT impedance values using the I/O
attribute editor.
Figure 57 • Receiver ODT Configuration
Following is the sample script to set ODT static and ODT impedance values using io.pdc:
set_io signal name
-iostd SSTL18I
-ODT_IMP 75
-ODT_STATIC On
-DIRECTION INPUT
Signal name is the user I/O name that the designer has to set ODT static and impedance values.
Microsemi Proprietary and Confidential UG0445 User Guide Revision 7.0
Table 64, page 97 for ODT impedance values of different I/O standards.
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