Integra DTR-7.6 Series Service Manual page 43

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IC BLOCK DIAGRAMS AND DESCRIPTIONS
CS5340-CZZ(101dB,192kHz, Multi-Bit Audio A/D Converter)
FILT+
AINL
AINR
TE
L 13942296513
Pin Pin Name
1 M0
16 M1
2 MCLK
3 VL
4 SDOUT
5,14 GND
6 VD
7 SCLK
8 LRCK
9 RST
10 AINL
12 AINR
11 VQ
13 VA
15 FILT+
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VQ REFGND
Voltage Reference
+
LP Filter
-
S/H
DAC
S/H
+
LP Filter
-
DAC
VA
3.3V-5.0V
I/O Description
I
Mode Selection-Determines the operational mode of the device.
I
I Master Clock-Clock source for the delta-sigma modulator and digital filters.
Logic Power-Positive power supply for digital input/output.
O Serial Audio Data Output-Output for two's complement serial audio data.
Ground-Connect to the analog ground.
I Digital Power-Positive power supply for the digital section.
I/O Serial Clock-Serial clock for the serial audio interface.
Left Right Clock-Determines which channel, Left and Right, is currently
I/O
active on the serial audio data line.
I Reset-The device enters a low power mode when low.
I
Analog Input-The full scale analog input level is 0.56Vp-p.
I
Quiescent Voltage-Filter connection for the internal quiescent
O
reference voltage.
Analog Power-Positive power supply for the analog section.
Positive Voltage Reference-Positive reference voltage for the internal
O
sampling circuits.
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2 9
8
V
L
1.8V-5.0V SCLK LRCK SDOUT MCLK
Serial Output Interface
Digital
High
Q
Decimation
Pass
Filter Filter
Digital
High
Q
Decimation
Pass
Filter
Filter
GND
VD
3.3V-5.0V
Q Q
3 6 7 1 3 1 5
co
.
9 4 2 8
RST
M0
M1
0 5 8 2 9 9 4 2 8
m
DTR-7.6
9 9
9 9