Addressing
Example of Slot-Oriented Address Assignment for I/O Modules
The figure below illustrates a sample ET 200S configuration, showing an example
of the address allocation for I/O modules. The addresses for the I/O modules are
predefined in default addressing.
Slot numbers
ET 200S
Allocated addresses
Figure 3-3
3.2
User-oriented addressing of the I/O Modules
User-oriented address allocation
User-oriented address allocation means you can select the following in units of 1
byte and independent of one another within the range 0 to 2047:
S Input addresses of modules
S Output addresses of modules
The addresses 0 to 127 are in the process image. Assign the addresses in
STEP 7. When you do this, you define the base address of the module, on which
all the addresses of the module depend.
0
Process image
Figure 3-4
Note
Bit-specific addressing is not possible in user-defined address allocation, and
compression of digital channels is therefore not supported. It is not possible to
compress addresses.
3-4
Example of address assignment for I/O modules
127
Structure of the address area for user-oriented addressing
1 to 3
4
5
6
IM
151-7
PM 4 DI
2 AI 2 AO
CPU
256
1.0
288
to
to
1.3
291
User-defined addressing
ET 200S IM 151-7 CPU Interface Module
7
8
4 DO
304
4.0
to
to
307
4.3
2047
A5E00058783-04