Aaeon BOXER-6841M User Manual
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Aaeon BOXER-6841M User Manual

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BOXER-6841M
Fanless Embedded Box PC
User's Manual 1
Ed
st
Last Updated: October 23, 2018

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Summary of Contents for Aaeon BOXER-6841M

  • Page 1 BOXER-6841M Fanless Embedded Box PC User’s Manual 1 Last Updated: October 23, 2018...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows ® is a registered trademark of Microsoft Corp.  Intel , Platium , Celeron , and Xeon are registered trademarks of Intel ® ® ® ®...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-6841M  Wallmount bracket  Screw Package  Thermal Pad Package  Phoenix power connector  Product DVD with User’s Manual (in pdf) and drivers ...
  • Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. Preface...
  • Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
  • Page 7 Do NOT disassemble the motherboard so as not to damage the system or void your warranty. If the thermal pad had been damaged, please contact AAEON's salesperson to purchase a new one. Do NOT use those of other brands. The Hex Cylinder Coppers on the front panel are not removable.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation. Caution: There is a danger of explosion if the battery is incorrectly replaced.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 SKU List ........................5 Chapter 2 – Hardware Information ..................6 Dimensions ....................... 7 2.1.1 I/O Location ....................13 Jumpers and Connectors ..................15 List of Jumpers ....................... 17 2.3.1 Auto Power Button Enable/Disable Selection (JP1) ......
  • Page 12 2.4.15 SATA Signal connector 1~2 ..............30 2.4.16 Mini-Card Slot (Full-Mini Card) .............. 30 2.4.17 HDMI Port ....................32 CPU Installation..................... 34 DDR4 Memory Module Installation..............35 2.5” SATA Drive Installation................. 37 Graphic Card Installation ..................38 Chapter 3 - AMI BIOS Setup ....................44 System Test and Initialization ................
  • Page 13 Setup submenu: Chipset..................66 3.5.1 Chipset: System Agent (SA) Configuration ........... 67 3.5.1.1 System Agent (SA) Configuration: Graphics Configuration ..68 3.5.2 Chipset: PEG Port Configuration ............. 70 3.5.3 Chipset: PCH-IO Configuration ..............71 Setup submenu: Security ..................73 Setup submenu: Boot ..................74 Boot: BBS Priorities....................

  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 15: Specifications

    Specifications System Xeon Processor: Processor  Intel® Xeon® E3-1268L v5, 2.40 GHz Intel® Xeon® E3-1275 v6, 3.80 GHz KabyLake Processor: Intel® Core™ i7-7700T, 2.9 GHz Intel® Core™ i5-7500T, 2.8 GHz Intel® Core™ i3-7101TE, 3.4 GHz SkyLake Processor: Intel® Core™ i7-6700TE, 2.4 GHz Intel®...
  • Page 16 A1~A4PCIEx[16]*1 PCIEx[1]*1 A5/A6 PCIEx[8]*2 PCIEx[1]*1 A1/A3 PCIEx[16] Slot power total support 180W A2/A4 PCIEx[16] Slot power total support 250W Windows 10 IOT (64bit) OS Support  Windows 8.1 (64bit) Windows embedded 8 standard (64bit) Windows 7 (32bit) Windows embedded standard 7 (32/64bit) Ubantu 16.04 above Mechanical Rugged aluminum extrusion and heavy-duty steel...
  • Page 17 Environmental -20°C ~ 55°C according to IEC60068-2 with 0.5m/s Operating Temperature  airflow -20°C ~ 45°C according to IEC60068-2 with 0.5m/s airflow Storage Temperature  -45°C ~ 80°C (-49°F ~ 185°F) 5~95% @ 40°C, non-condensing Storage Humidity  HDD-1: Random, 1Grm, 5~500Hz, Anti-vibration Anti-Vibration ...

  • Page 18: Sku List

    SKU List PCIe PCIe PCIe Model (x16) (x8) (x1) BOXER-6841M-A1 H110 L/Fan BOXER-6841M-A2 H110 L/Fan 4USB3, 5LAN, BOXER-6841M-A3 C236 1COM, 2HDMI L/Fan DC12-24V BOXER-6841M-A4 C236 L/Fan BOXER-6841M-A5 C236 S/Fanless 4 Extra RS232 & BOXER-6841M-A6 C236 S/Fanless 1 VGA Model Key L/Fan –...

  • Page 19: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 20: Dimensions

    Dimensions BOXER-6841M-A1(A3) Chapter 2 – Hardware Information...
  • Page 21 Chapter 2 – Hardware Information...
  • Page 22 BOXER-6841M-A2(A4) Chapter 2 – Hardware Information...
  • Page 23 Chapter 2 – Hardware Information...
  • Page 24 BOXER-6841M-A5 Chapter 2 – Hardware Information...
  • Page 25 BOXER-6841M-A6 Chapter 2 – Hardware Information...

  • Page 26: I/O Location

    2.1.1 I/O Location BOXER-6841M-A1~A5 Chapter 2 – Hardware Information...
  • Page 27 BOXER-6841M-A6 • DOS display in VGA mode, not HDMI mode. Chapter 2 – Hardware Information...

  • Page 28: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 29 Solder Side Chapter 2 – Hardware Information...

  • Page 30: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application. Label Function Auto Power Button Enable/Disable Selection Com1 pin9 function select Clear CMOS Jumper PEG Lanes CFG6 selection PEG Lanes CFG5 selection 2.3.1 Auto Power Button Enable/Disable Selection (JP1) 1 2 3...

  • Page 31: Peg Lanes Cfg6 / Cfg5 Selection (Jp8 / Jp9)

    2.3.3 PEG Lanes CFG6 / CFG5 Selection (JP8 / JP9) For 2 x8 PCI Express (JP8 1-2) (JP9 2-3) For 1 x16 PCI Express 1 2 3 1 2 3 (JP8 1-2) (JP9 1-2) PCIE X16 SLOT JUMPER to use 2 X8 riser card or 1x16 riser card. ※...

  • Page 32: List Of Connectors

    List of Connectors Please refer to the table below for all of the system’s connectors that you can configure for your application Label Function D-SUB 15 CRT Port HDMI1 HDMI Connector HDMI2 HDMI Connector USB3.0 Port 1~4 USB 3.0 Port LAN Port 1~5 RJ45 10/100/1000Bps LAN connector Audio Jack...

  • Page 33: Vga Port

    2.4.1 VGA Port Pin name Signal Type Signal Level GREEN BLUE VGA_VCC DDC_DATA VGA_HSYNC VGA_VSYNC DDC_CLK Chapter 2 – Hardware Information...

  • Page 34: Sim Slot

    2.4.2 SIM Slot Pin name Signal Type Signal Level UIM_PWR UIM_RST UIM_CLK UIM_VPP UIM_DATA 2.4.3 CPU FAN Socket Pin name Signal Type Signal Level +VCC_FAN_CPU_CON FAN_TAC_CPU_CON FAN_CTL_CPU_CON 2.4.4 SPI Port Pin name Signal Type Signal Level SPI_MISO SPI_CLK +3.3VSB +3.3V SPI_MOSI SPI_CS Chapter 2 –...

  • Page 35: Lan (Rj-45)+Dual Usb3.0

    2.4.5 LAN (RJ-45)+DUAL USB3.0 Pin name Signal Type Signal Level DIFF MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF MDI3- Chapter 2 – Hardware Information...
  • Page 36 Pin name Signal Type Signal Level +5VSB DIFF USB0_D- DIFF USB0_D+ USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB DIFF USB1_D- DIFF USB1_D+ USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF Chapter 2 – Hardware Information...

  • Page 37: Pciex16 Port

    2.4.6 PCIEx16 Port Standard specification 2.4.7 COM1 (Wafer Box, Optional Pin name Signal Type Signal Level DCD1 DSR1 RTS1 ±9V ±9V CTS1 DTR1 ±9V Chapter 2 – Hardware Information...

  • Page 38: Com1 Db9 Connector

    2.4.8 COM1 DB9 connector RS232 RS422 RS485 Chapter 2 – Hardware Information...

  • Page 39: Dual Usb3.0

    2.4.9 DUAL USB3.0 Pin name Signal Type Signal Level +5VSB DIFF USB0_D- DIFF USB0_D+ USB0_SSRX− DIFF USB0_SSRX+ DIFF USB0_SSTX− DIFF USB0_SSTX+ DIFF +5VSB DIFF USB1_D- DIFF USB1_D+ USB1_SSRX− DIFF USB1_SSRX+ DIFF USB1_SSTX− DIFF USB1_SSTX+ DIFF Chapter 2 – Hardware Information...

  • Page 40: Dc-In Connector

    2.4.10 DC-IN CONNECTOR Pin name Signal Type Signal Level +12V~+24V GND_EARTH 2.4.11 COM2/3/4/5 RS232 RS422 RS485 Chapter 2 – Hardware Information...

  • Page 41: Lpc Port

    2.4.12 LPC Port LAD0 LAD1 LAD2 LAD3 +3.3V LFRAME# LRESET# LCLK LDRQ0 LDRQ1 SERIRQ Pin name Signal Type Signal Level +3.3V LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V LFRAME# +3.3V LRESET# LCLK LDRQ0 LDRQ1 +3.3V SERIRQ Chapter 2 – Hardware Information...

  • Page 42: Pwr Led/Hed Led

    2.4.13 PWR LED/HED LED Pin name Signal Type Signal Level HDD_LED- PWR_LED- 2.4.14 SATA Power connector 1~2 Pin name Signal Type Signal Level +12V +12V Chapter 2 – Hardware Information...

  • Page 43: Sata Signal Connector 1~2

    2.4.15 SATA Signal connector 1~2 Pin name Signal Type Signal Level SATA_TX+ DIFF SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF 2.4.16 Mini-Card Slot (Full-Mini Card) Pin name Signal Type Signal Level PCIE_WAKE# +3.3V +3.3VSB +1.5V +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA Chapter 2 – Hardware Information...
  • Page 44 PCIE_REF_CLK- DIFF UIM_CLK PCIE_REF_CLK+ DIFF UIM_RST UIM_VPP W_DISABLE# +3.3V PCIE_RST# +3.3V PCIE_RX- DIFF +3.3VSB +3.3V PCIE_RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V PCIE_TX- DIFF SMB_DATA +3.3V PCIE_TX+ DIFF USB_D- DIFF USB_D+ DIFF Chapter 2 – Hardware Information...

  • Page 45: Hdmi Port

    +3.3VSB +3.3V +3.3VSB +3.3V +1.5V +1.5V +3.3VSB +3.3V 2.4.17 HDMI Port Pin name Signal Type Signal Level HDMI_DATA2_P HDMI_DATA2_N HDMI_DATA1_P HDMI_DATA1_N Chapter 2 – Hardware Information...
  • Page 46 HDMI_DATA0_P HDMI_DATA0_N HDMI_CLK_P DIFF HDMI_CLK_N DIFF HDMI_SCL HDMI_SDA HDMI_PWR HDMI_HDP Chapter 2 – Hardware Information...

  • Page 47: Cpu Installation

    CPU Installation Step 1: Turn off the system, unplug the power cord and make sure the system is off. Step 2: Have Intel KabyLake/Skylake/Xeon FCLGA1151 Processor (Max. TDP 35W – KabyLake/Skylake; 73W – Xeon) ready. Step 3: Install the CPU into the socket and place the thermal pad onto it. Chapter 2 –...

  • Page 48: Ddr4 Memory Module Installation

    DDR4 Memory Module Installation Turn off the system, unplug the power cord to make sure the system is power off.  Step 1: Remove the screws as instructed below and remove the heatsink. Remove side cover by unscrewing 4 bolts Chapter 2 –...
  • Page 49 Step 2: Place the thermal pads onto the RAM modules as instructed below. Chapter 2 – Hardware Information...

  • Page 50: Sata Drive Installation

    2.5” SATA Drive Installation Turn off the system, unplug the power cord to make sure the system is power off. Use the HDD screws provided to assemble 2.5” SATA drive with the HDD Bracket. Chapter 2 – Hardware Information...

  • Page 51: Graphic Card Installation

    Graphic Card Installation BOXER-6841M-A1 to A4 SKUs support PCIe[x16] graphic card standard high at 114.55mm as below. Length should be under 350mm. BOXER-6841M-A5 and A6 SKUs support PCIe[x8] extension card standard high at 114.55mm as below. Length should be under 192mm.
  • Page 52 **Lock the extension card with the RISER Bracket. Chapter 2 – Hardware Information...
  • Page 53 For SKU BOXER-6841M-A1/A3, Graphic Card max support 180W, please connect graphic card to power connector cable 1. For SKU BOXER-6841M-A2/A4 , Graphic Card max support 250W, require dual power adapter to provide up to 400W power, please connect graphic card to power cable 1 and power cable 2.
  • Page 54 250W Graphic need an extra power board and special power sequence Please follow the power-up steps below Insert 12V-240W adaptor Graphic power input Chapter 2 – Hardware Information...
  • Page 55 Turn on the 12V adaptor Check the 12V adaptor indicator LED is blue Chapter 2 – Hardware Information...
  • Page 56 Insert 12V-24V adaptor system power input Switch on the system and you will see screen on the monitor Chapter 2 – Hardware Information...

  • Page 57: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 58: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 59: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 60: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 61: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 62: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options summary: Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). Intel (VMX) Disabled Virtualization Enabled Optimal Default, Failsafe Default Technology When enabled, a VMM can utilize the additional hardware capabilities provided by...

  • Page 63: Advanced: Trusted Computing

    3.4.2 Advanced: Trusted Computing Options summary: Security Device Enabled Optimal Default, Failsafe Default Support Disabled Enable/Disable Security Device. NOTE: Your Computer will reboot during restart in order to change State of the Device. SHA-1 PCR Bank Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SHA-1 PCR Bank SHA256 PCR Bank...
  • Page 64 Enable or Disable Platform Hierarchy Storage Hierarchy Enabled Optimal Default, Failsafe Default Disabled Enable or Disable Storage Hierarchy Endorsement Enabled Optimal Default, Failsafe Default Hierarchy Disabled Enable or Disable Endorsement Hierarchy TPM2.0 UEFI Spec TCG_2 Optimal Default, Failsafe Default Version TCG_1_2 Select the TCG2 Spec Version Support TCG_1_2: the Compatible mode for Win8/Win10...

  • Page 65: Advanced: Sata Configuration

    3.4.3 Advanced: SATA Configuration Options summary: SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Device. SATA Mode AHCI Mode Optimal Default, Failsafe Default Selection Intel RST Premium With Intel Optane System Acceleration Determines how SATA controller(s) operate. Port 0/1/2/3 Enabled Optimal Default, Failsafe Default...

  • Page 66: Advanced: Pch-Fw Configuration

    3.4.4 Advanced: PCH-FW Configuration Chapter 3 – AMI BIOS Setup...

  • Page 67: Pch-Fw Configuration: Firmware Update Configuration

    3.4.4.1 PCH-FW Configuration: Firmware Update Configuration Options summary: ME FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enable or Disable ME FW Image Re-Flash function. Chapter 3 – AMI BIOS Setup...

  • Page 68: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 69: Sio Configuration: Serial Port 1 Configuration

    3.4.5.1 SIO Configuration: Serial Port 1 Configuration Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Select an optimal setting for IO device Mode: RS232 Optimal Default, Failsafe Default...

  • Page 70: Sio Configuration: Serial Port 2 Configuration

    3.4.5.2 SIO Configuration: Serial Port 2 Configuration *This setup menu is ONLY for BOXER-6841M-A6 SKU. Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8;...

  • Page 71: Sio Configuration: Serial Port 3 Configuration

    3.4.5.3 SIO Configuration: Serial Port 3 Configuration *This setup menu is ONLY for BOXER-6841M-A6 SKU. Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8;...

  • Page 72: Sio Configuration: Serial Port 4 Configuration

    3.4.5.4 SIO Configuration: Serial Port 4 Configuration *This setup menu is ONLY for BOXER-6841M-A6 SKU. Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2F8;...

  • Page 73: Sio Configuration: Serial Port 5 Configuration

    3.4.5.5 SIO Configuration: Serial Port 5 Configuration *This setup menu is ONLY for BOXER-6841M-A6 SKU. Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default IO=2D0;...

  • Page 74: Advanced: Hardware Monitor

    3.4.6 Advanced: Hardware Monitor Options summary: Smart Fan Disabled Enabled Optimal Default, Failsafe Default Enable or Disable Smart Fan Chapter 3 – AMI BIOS Setup...

  • Page 75: Hardware Monitor: Smart Fan Mode Configuration

    3.4.6.1 Hardware Monitor: Smart Fan Mode Configuration Options summary: Fan 1 Smart Fan Control Manual RPM Mode Manual Duty Mode Auto RPM Mode Auto Duty-Cycle Mode Optimal Default, Failsafe Default Smart Fan Mode Select Temperature Source Optimal Default, Failsafe Default System Select the monitored temperature source for this fan Temperature 1/2/3/4...

  • Page 76: Advanced: Usb Configuration

    3.4.7 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Chapter 3 –...

  • Page 77: Advanced: Digital Io Port Configuration

    3.4.8 Advanced: Digital IO Port Configuration Options summary: DIO Type Output Optimal Default, Failsafe Default Input DIO Direction Type Setting DIO Data High Optimal Default, Failsafe Default DIO Output High/Low Setting Chapter 3 – AMI BIOS Setup...

  • Page 78: Advanced: Power Management

    3.4.9 Advanced: Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. AC Power Loss Last State Optimal Default, Failsafe Default Power On Power Off Select power state when power is re-applied after a power failure. RTC wake system Disabled Optimal Default, Failsafe Default...

  • Page 79: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 80: Chipset: System Agent (Sa) Configuration

    3.5.1 Chipset: System Agent (SA) Configuration Options summary: Max TOLUD Dynamic Optimal Default, Failsafe Default 1 GB 1.25 GB 1.5 GB 1.75 GB 2 GB 2.25 GB 2.5 GB 2.75 GB 3 GB 3.25 GB 3.5 GB Maximum Value of TOLUD. Dynamic assignment would adjust TOLUD automatically based on largest MMIO length of installed graphic controller.

  • Page 81: System Agent (Sa) Configuration: Graphics Configuration

    Select the Video Device which will be activated during POST. This has no effect if external graphics present. Secondary boot display selection will appear based on your selection. VGA modes will be supported only on primary display. *Setup option VGA is ONLY for BOXER-6841M-A6 SKU. Secondary IGFX Boot Disabled...
  • Page 82 HDMI 2 Select Secondary Display Device *Setup option VGA is ONLY for BOXER-6841M-A6 SKU. Chapter 3 – AMI BIOS Setup...

  • Page 83: Chipset: Peg Port Configuration

    3.5.2 Chipset: PEG Port Configuration Options summary: MAX Link Speed Gen1 Gen2 Gen3 Auto Optimal Default, Failsafe Default Configure PEG Max Speed *Setup item PEG 0:1:1 is ONLY for BOXER-6841M-A3/A4/A5/A6 SKU. Chapter 3 – AMI BIOS Setup...

  • Page 84: Chipset: Pch-Io Configuration

    3.5.3 Chipset: PCH-IO Configuration Options summary: HD Audio Disabled Enabled Auto Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Disabled / Enabled = HDA will be unconditionally disabled / enabled Auto = HDA will be enabled if present, disabled otherwise. Riser Card x1 PCIe Auto Optimal Default, Failsafe Default...
  • Page 85 Configure PCIe Speed *Setup item Mini-Card 1 PCIe Speed is ONLY for BOXER-6841M-A3/A4/A5/A6 SKU. Chapter 3 – AMI BIOS Setup...

  • Page 86: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).

  • Page 87: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enables or disables Quiet Boot option. Launch PXE OpROM Disabled Optimal Default, Failsafe Default Enabled Controls the execution of UEFI and Legacy PXE OpROM. Chapter 3 – AMI BIOS Setup...

  • Page 88: Boot: Bbs Priorities

    Boot: BBS Priorities Chapter 3 – AMI BIOS Setup...

  • Page 89: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 90: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 91: Product Cd/Dvd

    Product CD/DVD The BOXER-6841M comes with a product DVD that contains all the drivers and utilities you need to setup your product. Insert the DVD and follow the steps in the autorun program to install the drivers. PS: System Driver only supports "Win7 64bit", "Win7 32bit" will not supported.
  • Page 92 Step 4 – Install Audio Driver Open the Step 4 - Audio folder and select the correct chipset and OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically Step 5 – Install USB3.0 Driver Open the Step 5 –...
  • Page 93 Follow the instructions Drivers will be installed automatically Chapter 4 – iX Developer...

  • Page 94: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 95: Watchdog Timer Initial Program

    Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E (Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F (Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 96 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 97 ********************************************************************************* Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ********************************************************************************* Appendix A – Watchdog Timer Programming...
  • Page 98 ********************************************************************************* // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 0 // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting();...
  • Page 99 ********************************************************************************* SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 <<...

  • Page 100: Appendix C - I/O Information

    Appendix B Appendix C - I/O Information...

  • Page 101: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 102 Appendix B – I/O Information...

  • Page 103: Memory Address Map

    Memory Address Map Appendix B – I/O Information...

  • Page 104: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...

  • Page 105: Appendix C - Electrical Specifications For I/O Ports

    Appendix C Appendix C – Electrical Specifications for I/O Ports...

  • Page 106: Electrical Specifications For I/O Ports

    Electrical Specifications for I/O Ports Appendix C – Digital I/O Information...

  • Page 107: Dio Programming

    DIO Programming BOXER-6841M utilizes FINTEK 81866 chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial watchdog timer program is also attached based on which you can develop customized program to fit your application.

  • Page 108: Digital I/O Register

    Digital I/O Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Digital Input relative register table Register BitNum Value...
  • Page 109 Data DIO-4 Output 0x06(Note39) 0x89 (Note40) 2(Note41) (Note42) GPIO82 Data DIO-5 Output 0x89 0x06(Note43) 5(Note45) (Note46) GPIO85 Data (Note44) DIO-6 Output 0x06(Note47) 0x89 (Note48) 4(Note49) (Note50) GPIO84 Data DIO-7 Output 0x06(Note51) 0x89 (Note52) 6(Note53) (Note54) GPIO86 Data DIO-8 Output 0x06(Note55) 0x89 (Note56) 7(Note57) (Note58)

  • Page 110: Digital I/O Sample Program

    C.4 Digital I/O Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Digital Input Status relative definition (Please reference to Table 2) #define byte DInput1LDN // This parameter is represented from Note3 #define byte DInput1Reg // This parameter is represented from Note4...
  • Page 111 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note27 #define byte DOutput1Reg // This parameter is represented from Note28 #define byte DOutput1Bit // This parameter is represented from Note29 #define byte DOutput1Val // This parameter is represented from Note30 #define byte DOutput2LDN // This parameter is represented from Note31 #define byte DOutput2Reg // This parameter is represented from Note32...
  • Page 112 ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low 1: Digital I/O Pin level is High PinStatus = AaeonReadPinStatus(DInput3LDN, DInput3Reg, DInput3Bit); // Procedure : AaeonSetOutputLevel // Input : Example, Set Digital I/O Pin 6 level...
  • Page 113 ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ; AaeonSetOutputLevel(byte LDN, byte Register, byte BitNum, byte Value) VOID ConfigToOutputMode(LDN, Register, BitNum); SIOBitSet(LDN, Register, BitNum, Value); ************************************************************************************ Appendix C – Digital I/O Information...
  • Page 114 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 <<...

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