Related Manuals for Aaeon BOXER-6640
Summary of Contents for Aaeon BOXER-6640
- Page 1 BOXER-6640 Fanless Embedded Box PC User’s Manual 1 Last Updated: October 3, 2017...
- Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
- Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows ® is a registered trademark of Microsoft Corp. Intel , Platium , Celeron , and Xeon are registered trademarks of Intel ® ® ® ®...
- Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity BOXER-6640 Wallmount bracket Screw Package Thermal Pad Phoenix power connector Product DVD with User’s Manual (in pdf) and drivers ...
- Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. Preface...
- Page 6 Safety Precautions Please read the following safety instructions carefully. It is advised that you keep this manual for future references All cautions and warnings on the device should be noted. Make sure the power source matches the power rating of the device. Position the power cord so that people cannot step on it.
- Page 7 Do NOT disassemble the motherboard so as not to damage the system or void your warranty. If the thermal pad had been damaged, please contact AAEON's salesperson to purchase a new one. Do NOT use those of other brands. The Hex Cylinder Coppers on the front panel are not removable.
- Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation. Caution: There is a danger of explosion if the battery is incorrectly replaced.
- Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
- Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
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Page 11: Table Of Contents
Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................4 Dimensions ......................5 Jumpers and Connectors ..................8 List of Jumpers ......................9 Block Diagram ......................10 List of Connectors ....................11 2.5.1 Setting Jumpers .................. - Page 12 System Test and Initialization ................32 AMI BIOS Setup ....................33 Setup Submenu: Main ..................34 Setup Submenu: Advanced ................35 3.4.1 Advanced: CPU Configuration ............36 3.4.2 Advanced: SATA Configuration ............37 3.4.3 Advanced: PCH-FW Configuration ............38 3.4.3.1 PCH-FW Configuration: Firmware Update Configuration ....39 3.4.4 Advanced: SIO Configuration ............
- Page 13 Watchdog Timer Initial Program ............... 63 Appendix B - I/O Information ....................68 I/O Address Map ....................69 IRQ Mapping Chart ....................71 Appendix C - Electrical Specifications for I/O Ports ............72 DIO Programming ....................73 DIO Register ......................74 DIO Sample Program ..................
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Page 14: Chapter 1 - Product Specifications
Chapter 1 Chapter 1 - Product Specifications... -
Page 15: Specifications
Specifications System Intel® Core™ i7-7700T, Quad Core, 2.9 GHz Processor Intel® Core™ i5-7600T, Quad Core, 2.8 GHz Intel® Core™ i3-7300T, Dual Core, 3.5 GHz Intel® Core™ i7-6700TE, Quad Core, 2.4 GHz Intel® Core™ i5-6500TE, Quad Core, 2.3 GHz Intel® Core™ i3-6100TE, Dual Core, 2.7 GHz * Note: All of the above processors operate within TDP 35W. - Page 16 Windows® 10 (64-bit) OS Support Windows® 8.1 (64-bit) WES7/WES8/Win 7 Mechanical Rugged aluminum extrusion and heavy-duty Construction steel Wallmount Mounting DIN rail (optional) 264mm x 96.4mm x 186.2mm (10.4 x 3.8 x 7.3") Dimension (W x H x D) ...
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Page 17: Chapter 2 - Hardware Information
Chapter 2 Chapter 2 – Hardware Information... -
Page 18: Dimensions
Dimensions 1 8 6 . 2 0 1 8 6 . 2 0 Chapter 2 – Hardware Information... - Page 19 2 8 2 . 1 5 2 8 2 . 1 5 1 8 6 2 6 4 . 1 5 2 9 8 . 1 5 2 6 4 . 1 5 1 8 6 2 9 8 . 1 5 Chapter 2 –...
- Page 20 2 6 4 . 1 5 2 9 8 . 1 5 1 8 6 . 2 0 1 8 6 . 2 0 Chapter 2 – Hardware Information...
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Page 21: Jumpers And Connectors
Jumpers and Connectors PC Ie Chapter 2 – Hardware Information... -
Page 22: List Of Jumpers
List of Jumpers Please refer to the table below for all of the system’s jumpers that you can configure for your application. Label Function AT/ATX mode select Clear CMOS Chapter 2 – Hardware Information... -
Page 23: Block Diagram
Block Diagram Chapter 2 – Hardware Information... -
Page 24: List Of Connectors
List of Connectors Please refer to the table below for all of the system’s connectors that you can configure for your application Label Function CRT port CN2/CN8 DC-IN HDMI2/DP2 connector HDMI1/DP2 connector CN13 SPI ROM connector CN24 DIO connector Dual stack USB (3.0) + LAN Dual stack USB (3.0) + LAN CN22 Audio Jack... - Page 25 COM2 Dual COM port (COM3/ COM4) PCIE1 Minicard connector(SATA Only) PCIE2 Minicard connector CN15 SIM card connector Chapter 2 – Hardware Information...
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Page 26: Setting Jumpers
2.5.1 Setting Jumpers You configure your card to match the needs of your application by setting jumpers. A jumper is the simplest kind of electric switch. It consists of two metal pins and a small metal clip (often protected by a plastic cover) that slides over the pins to connect them. To “close”... -
Page 27: Auto Power Button (Jp1)
2.5.3 Auto Power Button (JP1) Disable Enable (Default) Function Normal (Default) Clear CMOS 2.5.4 Mini Card Connector With on board SIM Signal Signal PCIE_WAKE# +V3.3A +1.5V PCIE_CLK_REQ# UIM_PWR UIM_DATA PCIE_REF_CLK- UIM_CLK PCIE_REF_CLK+ UIM_RST UIM_VPP Chapter 2 – Hardware Information... -
Page 28: Sata1/ Sata2/ Sata3) Sata Port
W_DISABLE# PCIE_RST# PCIE_RX- +V3.3A PCIE_RX+ +1.5V SMB_CLK PCIE_TX- PCIE_TX- SMB_DATA PCIE_TX+ USB_D- USB_D+ +V3.3A +V3.3A +1.5V +V3.3A 2.5.5 (SATA1/ SATA2/ SATA3) SATA Port Pin 1 Pin 7 Pin Name Signal Type Signal level SATA_TX+ DIFF Chapter 2 – Hardware Information... -
Page 29: Pwr1/ Pwr2/ Pwr3) Sata Pwr Port
Pin Name Signal Type Signal level SATA_TX- DIFF SATA_RX- DIFF SATA_RX+ DIFF 2.5.6 (PWR1/ PWR2/ PWR3) SATA PWR Port Level Pin Name +12V Chapter 2 – Hardware Information... -
Page 30: Lan + Usb 3.0
2.5.7 LAN + USB 3.0 Signal Signal MDI0+ MDI0- MDI1+ MDI2+ MDI2- MDI1- MDI3+ MDI3- VBUS_1 VBUS_2 (A)D- (B)D- (A)D+ (B)D+ (A)SSRX- (B)SSRX- (A)SSRX+ (B)SSRX+ (A)SSTX- (B)SSTX- (A)SSTX+ (B)SSTX+ Chapter 2 – Hardware Information... -
Page 31: Vga Port
2.5.8 VGA port Signal Signal Green Blue VGA_VCC DDC_DATA VGA_HSYNC VGA_VSYNC DDC_CLK Chapter 2 – Hardware Information... -
Page 32: Dc-In
2.5.9 DC-IN Signal Signal PWR_IN 2.5.10 HDMI port Signal Signal HDMI_DATA2_P HDMI_DATA2_N HDMI_DATA1_P HDMI_DATA1_N HDMI_DATA0_P HDMI_DATA0_N HDMI_CLK_P HDMI_CLK_N HDMI_SCL HDMI_SDA HDMI_PWR HDMI_HDP HDMI_DATA2_P HDMI_DATA2_N HDMI_DATA1_P HDMI_DATA1_N HDMI_DATA0_P Chapter 2 – Hardware Information... - Page 33 HDMI_DATA0_N HDMI_CLK_P HDMI_CLK_N HDMI_SCL HDMI_SDA HDMI_PWR HDMI_HDP Chapter 2 – Hardware Information...
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Page 34: Dio Port
2.5.11 DIO port Signal Signal DIO0 DIO1 DIO2 DIO3 DIO4 DIO5 DIO6 DIO7 2.5.12 Remote switch connector Signal Signal PANSWH# 2.5.13 COM Port RS-232 RS422 RS-485 Chapter 2 – Hardware Information... - Page 35 DATA- DATA+ Chapter 2 – Hardware Information...
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Page 36: Cpu Installation
CPU Installation Turn off the system, unplug the power cord and make sure the system is off. Have Intel Kabylake or Intel SkyLake-S FCLGA1151 Processor (Max. TDP 35W) ready. Step 1: Remove the screws as instructed below and remove the heatsink. Chapter 2 –... - Page 37 Step 2: Install the CPU into the socket and place the thermal pad onto it. Chapter 2 – Hardware Information...
- Page 38 Step 3: Place the heatsink back on and fasten the screws as instructed below. Chapter 2 – Hardware Information...
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Page 39: Ddr4 Memory Module Installation
2.7 DDR4 Memory Module Installation Step 1. Turn off the system, unplug the power cord to make sure the system is power off. Chapter 2 – Hardware Information... - Page 40 Step 2. Place the thermal pads onto the RAM modules as instructed below. Chapter 2 – Hardware Information...
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Page 41: Sata Drive Installation
2.5” SATA Drive Installation Turn off the system, unplug the power cord to make sure the system is power off. Step 1: Use the HDD screws provided to assemble 2.5” SATA drive with the HDD Bracket Step 2: Assemble the 2.5” HDD Driver kit with bottom case and connect the SATA signal cable and SATA power cable with the 2.5”... - Page 42 Chapter 2 – Hardware Information...
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Page 43: Power Connector Installation
Power Connector Installation Step 1: Take out 3-pin green phoenix power connector from the accessory kit Step 2: Refer to below power pin out Chapter 2 – Hardware Information... -
Page 44: Chapter 3 - Ami Bios Setup
Chapter 3 Chapter 3 - AMI BIOS Setup... -
Page 45: System Test And Initialization
System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory. -
Page 46: Ami Bios Setup
AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>... -
Page 47: Setup Submenu: Main
Setup Submenu: Main Chapter 3 – AMI BIOS Setup... -
Page 48: Setup Submenu: Advanced
Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup... -
Page 49: Advanced: Cpu Configuration
3.4.1 Advanced: CPU Configuration Options summary: Hyper-Threading Disabled Enabled Optimal Default, Failsafe Default Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). Disabled Enabled Optimal Default, Failsafe Default When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. -
Page 50: Advanced: Sata Configuration
3.4.2 Advanced: SATA Configuration Options summary: SATA Controller(s) Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Device. SATA Mode AHCI Mode Optimal Default, Failsafe Default Selection Determines how SATA controller(s) operate. Enabled Optimal Default, Failsafe Default Disabled Enable or Disable SATA Port. Enabled Disabled Optimal Default, Failsafe Default... -
Page 51: Advanced: Pch-Fw Configuration
3.4.3 Advanced: PCH-FW Configuration Chapter 3 – AMI BIOS Setup... -
Page 52: Pch-Fw Configuration: Firmware Update Configuration
3.4.3.1 PCH-FW Configuration: Firmware Update Configuration Options summary: ME FW Image Re-Flash Enabled Disabled Optimal Default, Failsafe Default Enable or Disable ME FW Image Re-Flash function. Chapter 3 – AMI BIOS Setup... -
Page 53: Advanced: Sio Configuration
3.4.4 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup... -
Page 54: Sio Configuration: Serial Port 1 Configuration
3.4.4.1 SIO Configuration: Serial Port 1 Configuration Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Select an optimal setting for IO device RS232 RS422 RS485... -
Page 55: Sio Configuration: Serial Port 2 Configuration
3.4.4.2 SIO Configuration: Serial Port 2 Configuration Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=3; IO=3F8; IRQ=4; Select an optimal setting for IO device Chapter 3 –... -
Page 56: Sio Configuration: Serial Port 3 Configuration
3.4.4.3 SIO Configuration: Serial Port 3 Configuration Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=11; IO=3F8; IRQ=11; Select an optimal setting for IO device Chapter 3 –... -
Page 57: Sio Configuration: Serial Port 4 Configuration
3.4.4.4 SIO Configuration: Serial Port 4 Configuration Options summary: Use This Disabled Device Enabled Optimal Default, Failsafe Default Enable or Disable Serial Port (COM) Use Automatic Settings Optimal Default, Failsafe Default IO=2F8; IRQ=11; IO=3F8; IRQ=11; Select an optimal setting for IO device Chapter 3 –... -
Page 58: Advanced: Hardware Monitor
3.4.5 Advanced: Hardware Monitor Chapter 3 – AMI BIOS Setup... -
Page 59: Advanced: Usb Configuration
3.4.6 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Chapter 3 –... -
Page 60: Advanced: Digital Io Port Configuration
3.4.7 Advanced: Digital IO Port Configuration Options summary: DIO Type Output Optimal Default, Failsafe Default Input DIO Direction Type Setting High Optimal Default, Failsafe Default DIO Output High/Low Setting Chapter 3 – AMI BIOS Setup... -
Page 61: Advanced: Power Management
3.4.8 Advanced: Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. Last State Optimal Default, Failsafe Default Power On Power Off Select power state when power is re-applied after a power failure. Disabled Optimal Default, Failsafe Default Fixed Time... -
Page 62: Setup Submenu: Chipset
Setup submenu: Chipset Chapter 3 – AMI BIOS Setup... -
Page 63: Chipset: System Agent (Sa) Configuration
3.5.1 Chipset: System Agent (SA) Configuration Options summary: Max TOLUD Dynamic Optimal Default, Failsafe Default 1 GB 1.25 GB 1.5 GB 1.75 GB 2 GB 2.25 GB 2.5 GB 2.75 GB 3 GB 3.25 GB 3.5 GB Maximum Value of TOLUD. Dynamic assignment would adjust TOLUD automatically based on largest MMIO length of installed graphic controller. -
Page 64: System Agent (Sa) Configuration: Graphics Configuration
3.5.1.1 System Agent (SA) Configuration: Graphics Configuration Options summary: Primary Display Auto Optimal Default, Failsafe Default IGFX PCIE VBIOS default Optimal Default, Failsafe Default HDMI/DP 1 HDMI/DP 2 Disable Optimal Default, Failsafe Default HDMI/DP 1 HDMI/DP 2 Chapter 3 – AMI BIOS Setup... -
Page 65: Chipset: Pch-Io Configuration
3.5.2 Chipset: PCH-IO COnfiguration Options summary: HD Audio Disabled Enabled Auto Optimal Default, Failsafe Default Control Detection of the HD-Audio device. Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Select PCI Express port speed Auto Optimal Default, Failsafe Default Gen1 Gen2 Gen3 Select PCI Express port speed... -
Page 66: Setup Submenu: Security
Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers). -
Page 67: Setup Submenu: Boot
Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Optimal Default, Failsafe Default Enables or disables Quiet Boot option. Disabled Optimal Default, Failsafe Default Enabled Controls the execution of UEFI and Legacy PXE OpROM. Chapter 3 – AMI BIOS Setup... -
Page 68: Boot: Bbs Priorities
Boot: BBS Priorities Chapter 3 – AMI BIOS Setup... -
Page 69: Setup Submenu: Save & Exit
Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup... -
Page 70: Chapter 4 - Drivers Installation
Chapter 4 Chapter 4 – Drivers Installation... -
Page 71: Product Cd/Dvd
Product CD/DVD The BOXER-6640 comes with a product DVD that contains all the drivers and utilities you need to setup your product. Insert the DVD and follow the steps in the autorun program to install the drivers. In case the program does not start, follow the sequence below to install the drivers. - Page 72 Step 4 – Install Audio Driver Open the Step4 - Audio folder and select your OS followed by the .exe file in the folder Follow the instructions Drivers will be installed automatically Step 5 – Install USB3.0 Driver Open the Step5 – USB3.0 folder and select your OS Open the .exe file in the folder Follow the instructions Drivers will be installed automatically...
- Page 73 Step 7 – Install Serial Port Driver (Optional) For Windows 7: Change User Account Control settings to Never notify Reboot and log in as administrator Chapter 4 – iX Developer...
- Page 74 Run patch.bat as administrator For Windows 8 and Windows 10: Open the Step 7 - Serial Port Driver (Optional) folder and select your OS Open the Setup.exe file in the folder Follow the instructions Drivers will be installed automatically Chapter 4 – iX Developer...
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Page 75: Appendix A - Watchdog Timer Programming
Appendix A Appendix A - Watchdog Timer Programming... -
Page 76: Watchdog Timer Initial Program
Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value... - Page 77 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
- Page 78 ************************************************************************************ Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
- Page 79 ************************************************************************************ // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 0 // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting();...
- Page 80 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 <<...
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Page 81: Appendix B - I/O Information
Appendix B Appendix B - I/O Information... -
Page 82: I/O Address Map
I/O Address Map Appendix B – I/O Information... - Page 83 Appendix B – I/O Information...
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Page 84: Irq Mapping Chart
IRQ Mapping Chart Appendix B – I/O Information... -
Page 85: Appendix C - Electrical Specifications For I/O Ports
Appendix C Appendix C - Electrical Specifications for I/O Ports... -
Page 86: Dio Programming
DIO Programming BOXER-6640 utilizes FINTEK 81866 chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial watchdog timer program is also attached based on which you can develop customized program to fit your application. -
Page 87: Dio Register
DIO Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Digital Input relative register table Register BitNum Value... -
Page 88: Dio Sample Program
DIO Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Digital Input Status relative definition (Please reference to Table 2) #define byte DInput1LDN // This parameter is represented from Note3 #define byte DInput1Reg // This parameter is represented from Note4... - Page 89 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note27 #define byte DOutput1Reg // This parameter is represented from Note28 #define byte DOutput1Bit // This parameter is represented from Note29 #define byte DOutput1Val // This parameter is represented from Note30 #define byte DOutput2LDN // This parameter is represented from Note31 #define byte DOutput2Reg // This parameter is represented from Note32...
- Page 90 ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low 1: Digital I/O Pin level is High PinStatus = AaeonReadPinStatus(DInput3LDN, DInput3Reg, DInput3Bit); // Procedure : AaeonSetOutputLevel // Input : Example, Set Digital I/O Pin 6 level...
- Page 91 ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ; AaeonSetOutputLevel(byte LDN, byte Register, byte BitNum, byte Value) VOID ConfigToOutputMode(LDN, Register, BitNum); SIOBitSet(LDN, Register, BitNum, Value); ************************************************************************************ Appendix C – Digital I/O Information...
- Page 92 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 <<...
- Page 93 ************************************************************************************ SIOBitRead(byte LDN, byte Register, byte BitNum) Boolean Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= (1 << BitNum); SIOExitMBPnPMode(); If(TmpValue == 0) Return 0; Return 1; ConfigToOutputMode(byte LDN, byte Register, byte BitNum) VOID Byte TmpValue, OutputEnableReg; OutputEnableReg = Register-1;...
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