Aaeon BOXER-6403 Manual
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Aaeon BOXER-6403 Manual

Embedded box pc intel celeron/atomtm processor, 1 usb 3.0, 3 usb 2.0, 2 com, 2 lan, 1 hdmi, 1 lvds, 2 mini-card
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E m b e d d e d B o x P C
B O X E R - 6 4 0 3
BOXER-6403
Boxer PC
®
®
TM
Intel
Processor
Celeron
/Atom
1 USB3.0, 3 USB2.0, 2 COM, 2 LAN,
1 HDMI, 1 LVDS, 2 Mini-Card
st
BOXER-6403 Manual 1
Ed.
February 17, 2015

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  • Page 1 E m b e d d e d B o x P C B O X E R - 6 4 0 3 BOXER-6403 Boxer PC ® ® Intel Processor Celeron /Atom 1 USB3.0, 3 USB2.0, 2 COM, 2 LAN, 1 HDMI, 1 LVDS, 2 Mini-Card BOXER-6403 Manual 1 February 17, 2015...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Acknowledgments All other products’ name or trademarks are properties of their respective owners.  AMI is a trademark of American Megatrends, Inc. ™...
  • Page 4 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Packing List Before setting up your PC, please make sure that the following materials are enclosed:  BOXER-6403 Boxer PC  Burn-Proof Bracket  RJ-45 to D-sub cable ...
  • Page 5 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Safety & Warranty Please read the following safety instructions carefully. It is advised that you keep this manual for future references Disconnect this device from any AC supply before cleaning.
  • Page 6 E m b e d d e d B o x P C B O X E R - 6 4 0 3 13. As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components.
  • Page 7 E m b e d d e d B o x P C B O X E R - 6 4 0 3 interference that may cause undesired operation. Caution: There is a danger of explosion if the battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
  • Page 8 E m b e d d e d B o x P C B O X E R - 6 4 0 3 China RoHS Requirements 产品中有毒有害物质或元素名称及含量 AAEON Boxer/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb)

  • Page 9: Table Of Contents

    1.1 Introduction ..............1-2 1.2 Features ..............1-3 1.3 Specifications ............1-4 Chapter 2 Hardware Installation 2.1 Dimension and I/O of BOXER-6403 ......2-2 2.2 List of Jumpers ............2-3 2.3 List of Connectors ............. 2-3 2.4 AT/ATX Power Supply Mode Selection (JP1) ..................
  • Page 10 E m b e d d e d B o x P C B O X E R - 6 4 0 3 2.17 Dry and Wet Contact Digital Input (CN23) ....2-11 2.18 Dry and Wet Contact Digital Output (CN24) ... 2-13 2.19 RJ-45 Ethernet Port (CN26) ........
  • Page 11 E m b e d d e d B o x P C B O X E R - 6 4 0 3 C.2 DIO Programming ..........C-3 C.3 Digital I/O Register ..........C-4 C.4 Digital I/O Sample Program ........ C-5...

  • Page 12: Chapter 1 General Information

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Chapter General Information 1- 1 Chapter 1 General Information...

  • Page 13: Introduction

    So far, there is no other boxer PC can be so small and slim like the BOXER-6403, not even PICO-ITX system. With this tiny form factor, customers can fit it almost anywhere, and it provides quite a lot of I/O ports for basic applications.

  • Page 14: Features

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 1.2 Features ® ®  Intel Celeron / Atom Processor  Ultra Compact design: 158mm x 95mm x 20mm ...

  • Page 15: Specifications

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 1.3 Specifications ® ®  CPU Intel Celeron /Atom Processor  Chipset  System Memory DDR3L 1333 SODIMM x 1, Max. 8 GB ...
  • Page 16 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Selection) Audio KB/MS Others Lockable DC Jack x 1, HDMI x 1  Expansion PCIe MiniCard Half Mini-Card x 1 (mSATA only), Full Mini-Card x 1 w/ SIM slot (Mini-Card w/ SIM) Mini PCI...
  • Page 17 E m b e d d e d B o x P C B O X E R - 6 4 0 3 5 ~ 95% @ 40 C, non-condensing  Anti-Vibration 3 g rms/ 5~500 Hz/ operation (mSATA)  Anti-Shock 20 G peak acceleration (11 msec.

  • Page 18: Chapter 2 Hardware Installation

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Chapter Hardware Installation Chapter 2 Hardware Installation...

  • Page 19: Dimension And I/O Of Boxer-6403

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 2.1 Dimension and I/O of BOXER-6403 V 0 1 2 3 G V 0 1 G 2 - 2...

  • Page 20: List Of Jumpers

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 2.2 List of Jumpers The board has a number of jumpers that allow you to configure your system to suit your application.

  • Page 21: Lvds Bklt Control Selection (Jp2)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 CN26 RJ-45 Ethernet Port CN27 RJ-45 Ethernet Port USB1 USB 2.0 Port 1 Connector USB2 USB 2.0 Port 2 Connector USB3 USB 2.0 Port 3 Connector BAT1...

  • Page 22: Lvds Power Selection (Jp3)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 PWM Mode (Default) 2.6 LVDS Power Selection (JP3) 1 2 3 1 2 3 3.3V (Default) Function 3.3V (Default) 2.7 LVDS BKLT Power Selection (JP4) 1 2 3...

  • Page 23: Dry And Wet Contact Digital Input Power Selection

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Clear CMOS 2.9 Dry and Wet Contact Digital Input Power Selection (JP6) 1 2 3 1 2 3 Wet Contact Digital Input Dry Contact Digital Input (Default)
  • Page 24 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Pin Name Signal Type Signal Level HDMI_TX2+ DIFF HDMI_TX2- DIFF HDMI_TX1+ DIFF HDMI_TX1- DIFF HDMI_TX0+ DIFF HDMI_TX0- DIFF HDMI_CLK+ DIFF...

  • Page 25: Com2 Rs-232/422/485 Connector (Cn4)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 USB_D- DIFF USB_D+ DIFF USB3.0 RX- DIFF USB3.0 RX+ DIFF USB3.0 TX- DIFF USB3.0 TX+ DIFF 2.13 COM2 RS-232/422/485 Connector (CN4) RS-232 RS-422 RS-485...

  • Page 26: Lpc Expansion I/F (Cn11)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 2.14 LPC Expansion I/F (CN11) Pin Name Signal Type Signal Level LAD0 +3.3V LAD1 +3.3V LAD2 +3.3V LAD3 +3.3V +3.3V...

  • Page 27: Com3 Rs-232 I/F (Cn16)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 2.15 COM3 RS-232 I/F (CN16) RS-232 2.16 COM1 RS-232/422/485 Connector (CN17) RS-232 RS-422 RS-485 2 - 10 Chapter 2 Hardware Installation...

  • Page 28: Dry And Wet Contact Digital Input (Cn23)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 DATA+ DATA- 2.17 Dry and Wet Contact Digital Input (CN23) 2 - 11 Chapter 2 Hardware Installation...
  • Page 29 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Dry Contact Wiring Wet Contact Wiring *Digital input voltage range: Max: 10 ~ 25V Min: 5V Pin Name Signal Type Signal Level Digital input 3...

  • Page 30: Dry And Wet Contact Digital Output (Cn24)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Digital input 2 Input DRY (5V) WET (3~30V) Digital input 1 Input DRY (5V) WET (3~30V) Digital input 0 Input DRY (5V) WET (3~30V)

  • Page 31: Ethernet Port (Cn26)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Digital output 4 Input Open collector to 30 Digital output POWER Input 3 ~ 30 V 2.19 RJ-45 Ethernet Port (CN26) Pin Name Signal Type Signal Level...

  • Page 32: Usb 2.0 Port 1 Connector (Usb1)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Pin Name Signal Type Signal Level MDI0+ DIFF MDI0- DIFF MDI1+ DIFF MDI2+ DIFF MDI2- DIFF MDI1- DIFF MDI3+ DIFF...

  • Page 33: Usb2.0 Port 3 Connector (Usb3)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 2.23 USB2.0 Port 3 Connector (USB3) Pin Name Signal Type Signal Level USB_D- DIFF USB_D+ DIFF 2.24 DDR3L SODIMM Slot (DIMM1) Standard Specification 2.25 Half Size MiniCard Slot (PCIE1) Pin Name...
  • Page 34 E m b e d d e d B o x P C B O X E R - 6 4 0 3 mSATA RX+ DIFF +3.3V +3.3V mSATA RX- DIFF +1.5V +1.5V SMB_CLK +3.3V mSATA_TX DIFF SMB_DATA +3.3V mSATA_TX+ DIFF 2 - 17 Chapter 2 Hardware Installation...

  • Page 35: Pci-E Full Size Minicard Slot (Pcie2)

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 +3.3V +3.3V +3.3V +3.3V +1.5V +1.5V +3.3V +3.3V 2.26 PCI-E Full Size MiniCard Slot (PCIE2) Pin Name Signal Type Signal Level +3.3V...
  • Page 36 E m b e d d e d B o x P C B O X E R - 6 4 0 3 PCIE RX- DIFF +3.3V +3.3V PCIE RX+ DIFF +1.5V +1.5V SMB_CLK +3.3V 2 - 19 Chapter 2 Hardware Installation...
  • Page 37 E m b e d d e d B o x P C B O X E R - 6 4 0 3 PCIE TX DIFF SMB_DATA PCIE TX+ DIFF +3.3V +3.3V +3.3V +3.3V +1.5V +1.5V +3.3V +3.3V 2 - 20 Chapter 2 Hardware Installation...
  • Page 38 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Chapter BIOS Setup Chapter 3 AMI BIOS Setup 3-1...

  • Page 39: System Test And Initialization

    3. The system configuration is reset by Clear-CMOS jumper 4. The CMOS memory has lost power and the configuration information has been erased. The BOXER-6403 CMOS memory has an integral lithium battery backup for data retention. However, you will need to replace the complete unit when it depletes.

  • Page 40: Ami Bios Setup

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 3.2 AMI BIOS Setup AMI BIOS ROM has a built-in Setup program that allows users to modify the basic system configuration. This type of information is stored in battery-backed CMOS RAM and BIOS NVRAM so that it retains the Setup information when the power is turned off.
  • Page 41 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Setup Menu Setup submenu: Main Chapter 3 AMI BIOS Setup 3-4...
  • Page 42 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Setup submenu: Advanced Chapter 3 AMI BIOS Setup 3-5...
  • Page 43 E m b e d d e d B o x P C B O X E R - 6 4 0 3 CPU Configuration Options summary: Intel Virtualization Disabled Technology Enabled Optimal Default, Failsafe Default EIST Disabled Enabled Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-6...
  • Page 44 E m b e d d e d B o x P C B O X E R - 6 4 0 3 IDE Configuration (IDE) Options summary: SATA Mode IDE Mode AHCI Mode Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-7...
  • Page 45 E m b e d d e d B o x P C B O X E R - 6 4 0 3 USB Configuration Options summary: Legacy USB Support Enabled Optimal Default, Failsafe Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS.
  • Page 46 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Hardware Monitor Chapter 3 AMI BIOS Setup 3-9...
  • Page 47 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Dynamic Digital IO Options summary: GPO0 Direction [Output] Output Level Optimal Default, Failsafe Default GPO1 Direction [Output] Output Level Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-10...
  • Page 48 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Power Management Options summary: Power Mode ATX Type Optimal Default, Failsafe Default AT Type Select power supply mode. AC Power Loss Last State Optimal Default, Failsafe Default...
  • Page 49 E m b e d d e d B o x P C B O X E R - 6 4 0 3 SIO Configuration Chapter 3 AMI BIOS Setup 3-12...
  • Page 50 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Serial Port 1 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default...
  • Page 51 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Serial Port 2 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe Default...
  • Page 52 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Serial Port 3 Configuration Options summary: Use This Device Disabled Enabled Optimal Default, Failsafe Default En/Disable Serial Port (COM) Possible: Use Automatic Settings Optimal Default, Failsafe...
  • Page 53 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Setup submenu: Chipset Chapter 3 AMI BIOS Setup 3-16...
  • Page 54 E m b e d d e d B o x P C B O X E R - 6 4 0 3 North Bridge Chapter 3 AMI BIOS Setup 3-17...
  • Page 55 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Display Control Configuration Options summary: DVMT Pre-Allocated Optimal Default, Failsafe Default 128M 160M 192M 224M 256M 288M 320M 352M 384M...
  • Page 56 E m b e d d e d B o x P C B O X E R - 6 4 0 3 South Bridge Options summary: Audio Controller Disabled Enabled Optimal Default, Failsafe Default Chapter 3 AMI BIOS Setup 3-19...
  • Page 57 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Security Change User/Supervisor Password You can install a Supervisor password, and if you install a supervisor password, you can then install a user password. A user password does not provide access to many of the features in the Setup utility.
  • Page 58 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Setup submenu: Boot Options summary: Quiet Boot Disabled Enabled Default En/Disable showing boot logo. Option ROM Messages Force BIOS Default Keep Current...
  • Page 59 E m b e d d e d B o x P C B O X E R - 6 4 0 3 BBS Priorities Chapter 3 AMI BIOS Setup 3-22...
  • Page 60 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Setup submenu: Exit Chapter 3 AMI BIOS Setup 3-23...

  • Page 61: Chapter 4 Driver Installation

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Chapter D river Installation 4 -1 Chapter 4 Driver Installation...
  • Page 62 E m b e d d e d B o x P C B O X E R - 6 4 0 3 The BOXER-6403 comes with a driver disk that contains all drivers and utilities that can help you setup your product.
  • Page 63 E m b e d d e d B o x P C B O X E R - 6 4 0 3 4.1 Installation Insert the BOXER-6403 driver disk into the disk drive. And install the drivers from Step 1 to Step 5 in order. Step 1 – Install Chipset Driver 1.
  • Page 64 E m b e d d e d B o x P C B O X E R - 6 4 0 3 2. Follow the instructions 3. Drivers will be installed automatically Step 5 – Install Intel Sideband Fabric Device Driver Open the Step 5 - Intel Sideband Fabric Device and open the Setup.exe file Follow the instructions...

  • Page 65: Appendix A Programming The Watchdog Timer

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix Programming the Watchdog Timer Appendix A Programming the Watchdog Timer...

  • Page 66: Watchdog Timer Initial Program

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E (Note1)
  • Page 67 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 68 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ Main VOID // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig();...
  • Page 69 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ // Procedure : AaeonWDTEnable AaeonWDTEnable () VOID WDTEnableDisable( EnableLDN, EnableReg, EnableBit, 1 // Procedure : AaeonWDTConfig AaeonWDTConfig () VOID // Disable WDT counting...
  • Page 70 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID...

  • Page 71: Appendix B I/O Information

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix I/O Information Appendix B I/O Information...

  • Page 72: I/O Address Map

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 B.1 I/O Address Map Appendix B I/O Information...
  • Page 73 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix B I/O Information...

  • Page 74: Memory Address Map

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 B.2 Memory Address Map Appendix B I/O Information...

  • Page 75: Irq Mapping Chart

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 B.3 IRQ Mapping Chart Appendix B I/O Information...
  • Page 76 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix B I/O Information...
  • Page 77 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix B I/O Information...
  • Page 78 E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix B I/O Information...

  • Page 79: Appendix C Electrical Specifications For I/O Ports

    E m b e d d e d B o x P C B O X E R - 6 4 0 3 Appendix Electrical Specifications for I/O Ports Appendix C Electrical Specifications for I/O Ports...
  • Page 80 E m b e d d e d B o x P C B O X E R - 6 4 0 3 C.1 Electrical Specifications for I/O Ports Reference Signal Name Rate Output Backlight Brightness +5V/0.5 or CN19 +VCC_LVDS_BKLT Control +12V/0.5 Connector...
  • Page 81 E m b e d d e d B o x P C B O X E R - 6 4 0 3 C.2 DIO Programming BOXER-6403 utilizes FINTEK 81866 chipset as its Digital I/O controller. Below are the procedures to complete its configuration and the AAEON initial watchdog timer program is also attached based on which you can develop customized program to fit your application.
  • Page 82 E m b e d d e d B o x P C B O X E R - 6 4 0 3 C.3 Digital I/O Register Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E (Note1)
  • Page 83 E m b e d d e d B o x P C B O X E R - 6 4 0 3 C.4 Digital I/O Sample Program ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value);...
  • Page 84 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ // Digital Output control relative definition (Please reference to Table 3) #define byte DOutput1LDN // This parameter is represented from Note21 #define byte DOutput1Reg // This parameter is represented from Note22 #define byte DOutput1Bit // This parameter is represented from Note23 #define byte DOutput1Val // This parameter is represented from Note24...
  • Page 85 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ Main VOID Boolean PinStatus ; // Procedure : AaeonReadPinStatus // Input : Example, Read Digital I/O Pin 3 status // Output : InputStatus : 0: Digital I/O Pin level is low...
  • Page 86 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ AaeonReadPinStatus(byte LDN, byte Register, byte BitNum) Boolean Boolean PinStatus ; PinStatus = SIOBitRead(LDN, Register, BitNum); Return PinStatus ; AaeonSetOutputLevel(byte LDN, byte Register, byte BitNum, VOID byte Value)
  • Page 87 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ SIOEnterMBPnPMode() VOID IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x87); SIOExitMBPnPMode() VOID IOWriteByte(SIOIndex, 0xAA); SIOSelectLDN(byte LDN) VOID IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value) VOID...
  • Page 88 E m b e d d e d B o x P C B O X E R - 6 4 0 3 ************************************************************************************ SIOBitRead(byte LDN, byte Register, byte BitNum) Boolean Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= (1 <<...

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