Denon S-5BD Service Manual page 143

SII9134CTU Pin Functions
SII9134CTU Pin Function
Pin
Pin #
Name
D0 98
D1 97
D2 96
D3 95
D4 94
D5 93
D6 92
D7 91
D8 90
D9 86
D10 85
D11 84
D12 83
D13 82
D14 81
D15 80
D16 79
D17 78
D18 77
D19 75
D20 74
D21 73
D22 72
D23 71
D24 70
D25 69
D26 68
D27 67
D28 63
D29 62
D30 61
D31 60
D32 59
D33 58
D34 57
D35 56
IDCK 88
DE 1
HSYNC 2
VSYNC 3
SCK 11
WS 10
SD0 9
SD1 8
SD2 7
SD3 6
DL0 17
DR0 16
DL1 19
DR1 18
DL2 21
DR2 20
DL3 23
DR3 22
DCLK 15
MCLK 5
SPDIF 4
Type Dir
LVTTL Input These are the lower 12 bits of the 36-bit pixel bus. These pins are highly con-
LVTTL Input figurable and support multiple RGB and YCbCr formats. See Data Bus Map-
LVTTL Input pings on page 30 for complete information.
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input These are the middle 12 bits of the 36-bit pixel bus.
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input These are the middle 12 bits of the 36-bit pixel bus.
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input
LVTTL Input Input Data Clock
LVTTL Input Data enable
LVTTL Input Horizontal Sync input control signal
LVTTL Input Vertical Sync input control signal
LVTTL Input I2S Serial Clock
LVTTL Input I2S Word Select
LVTTL Input I2S Serial Data
LVTTL Input I2S Serial Data
LVTTL Input I2S Serial Data
LVTTL Input I2S Serial Data
LVTTL Input One-bit Audio Data Left 0
LVTTL Input One-bit Audio Data Right 0
LVTTL Input One-bit Audio Data Left 1
LVTTL Input One-bit Audio Data Right 1
LVTTL Input One-bit Audio Data Left 2
LVTTL Input One-bit Audio Data Right 2
LVTTL Input One-bit Audio Data Left 3
LVTTL Input One-bit Audio Data Right 3
LVTTL Input One-bit Audio Clock Input
LVTTL Input Audio Input Master Clock
LVTTL Input S/PDIF Audio Input
DBP-4010UDCI/DBP-4010UD
Description
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