Denon S-5BD Service Manual page 120

Pin Pin Name
50 P135/ISRXD2 SOMI
51 P134/ISTXD2 MOSI
52 P57/RDY RDY
53 P56/ALE ALE
54 P55/HOLD/EPM HOLD/FRASH EPM
55 P54/HLDA HLDA
MUTE POWER/ROM
56 P133
POWER
57 VSS VSS
58 P132 GUI REQ
59 VCC VCC2
60 P131 TUNED
61 P130 LIMIT_DET
62 P53/BCLK BCLK
63 P52/RD RD
64 P51/(WR1)/BC1 BC1
65 P50/(WR0)/WR/CE WR/FRASH CE
66 P127 VOL_A
67 P126 VOL_B
68 P125 USB_RDY
69 P47/CS0/(A23) CS0
70 P46/(CS1)/A22 A22
71 P45/(CS2)/A21 A21
72 P44/(CS3)/A20 A20
73 P43/A19 A19
74 VCC VCC
75 P42/A18 A18
76 VSS VSS
77 P41/A17 A17
78 P40/A16 A16
79 P37/A15 A15
80 P36/A14 A14
81 P35/A13 A13
82 P34/A12 A12
83 P33/A11 A11
84 P32/A10 A10
85 P31/A9 A9
86 P124 EXP STB
87 P123 EXP OE
88 P122/(RXD6) EEPROM SCL
89 P121/(CLK6) EEPROM SDA
90 P120/(TXD6) NC
91 VCC VCC
92 P30/A8 A8
93 VSS VSS
94 P27/A7 A7
95 P26/A6 A6
96 P25/A5 A5
97 P24/A4 A4
Synbol I/O Type Pullup
I -
O C
I C M3VPu
O C
I C M3VPu
O C
O C
- -
O -
- -
I C
I C SW3VPu
O C
O C
O C
O C
I - SW3VPu
I - SW3VPu
I - 3.3VD1SWPu
O C
O C
O C
O C
O C
- -
O C
- -
O C
O C
O C
O C
O C
O C
O C
O C
O C
O C
O C
O - NS3VPu
I/O C NS3VPu
O N
- -
O C
- -
O C
O C
O C
O C
LvCnv STBY
- - I MAIN-SUB μcom communication control output pin
- - O/L MAIN-SUB μcom communication control output pin
- I External memory access pin(NC,Pup)
- - O/L External memory access pin(NC)
External memory access pin(NC,Pup)
- I
/Rewrite boot program start : L input set
- - O/L External memory access pin(NC)
For MUTE +B control pin/For extended ROM 3.3V control pinet
- - O/L
(POWER ON: H)
- - - GND
- - O/L POWER KEY(WAIT MODE cancel interrupt port)
- - - +3V
Pd - I Bureau existence detection input of tuner
- I Overcurrent LIMIT detection
- - O/L External memory access pin(NC)
- - O/L External memory access pin(connection: OE#)
- - O/L External memory access pin(NC)
External memory access pin(connection:WE#)/Rewrite boot program
- - O/L
start : L input set
- O/L Master Volume rotation detect input (Rotary encoder)(R2A15215)
- O/L Master Volume rotation detect input (Rotary encoder)(R2A15215)
Ready signal input from TCC8600; Normal operation : H,
- O/L
Rewriting : L(Access inhibit at this time)
- - O/L External memory access pin(connection:CS#)
- - O/L External memory access pin(NC)
- - O/L External memory access pin(NC)
- - O/L External memory access pin(connection:A19)
- - O/L External memory access pin(connection:A18)
- - - +3V
- - O/L External memory access pin(connection:A17)
- - - GND
- - O/L External memory access pin(connection:A16)
- - O/L External memory access pin(connection:A15)
- - O/L External memory access pin(connection:A14)
- - O/L External memory access pin(connection:A13)
- - O/L External memory access pin(connection:A12)
- - O/L External memory access pin(connection:A11)
- - O/L External memory access pin(connection:A10)
- - O/L External memory access pin(connection:A9)
- - O/L External memory access pin(connection:A8)
Enhancing EXP control terminal (CEC and IC Q. STBY after setting
- - O/L
the time is extended, to maintain state)
Enhancing EXP control terminal (CEC and IC Q. STBY after setting
- - O/L
the time is extended, to maintain state)
- O/H Extended EXP control pin
- I Extended EXP control pin
Pd - O/L NC
- - - +3V
- - O/L External memory access pin(connection:A7)
- - - GND
- - O/L External memory access pin(connection:A6)
- - O/L External memory access pin(connection:A5)
- - O/L External memory access pin(connection:A4)
- - O/L External memory access pin(connection:A3)
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