Denon S-5BD Service Manual page 127

Blu-ray disc/dvd surround receiver
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32-bit RISC Microprocessor for Host Player
Pin# Signal Name
36
XA[16] / SD_nRAS / ND_ALE
37
XA[17] / ND_CLE
38
XA[18] / DQM[0]
XA[19] / DQM[1]
39
40
VDDI
41
XA[20] / DQM[1]
XA[21] / DQM[0]
42
43
VDDIO
44
SD_CLK
45
VSS
46
SD_CKE / GPIO_B[0]
SD_nCS / GPIO_B[1]
47
48
nWE
49
nOE
nCS[0] / ND_nOE[0] / GPIO_B[2]
50
51
nCS[1] / ND_nOE[1] / GPIO_B[3]
52
nCS[2] / ND_nOE[2] / GPIO_B[4]
53
nCS[3] / ND_nOE[3] / GPIO_B[5]
54
XOUT
XIN
55
56
XTOUT
57
XTIN
58
VDDI
59
VSS
GPIO_B[6] / IDE_nCS1
60
61
ND_nWE / GPIO_B[7]
62
GPIO_B[8] / UART0TXD
GPIO_B[9] / UART0RXD
63
64
READY / MODE0
65
VDDIO
66
ADIN4
67
ADIN2
ADIN0
68
69
VDDADC
70
VSSADC
VSSPLL1
71
72
XFILT1
73
VDDPLL1
74
VDDPLL
75
XFILT
VSSPLL
76
77
nRESET
78
MODE1
79
USBH0_DN / GPIO_B[29]
80
USBH0_DP / GPIO_B[28]
VSS
81
82
USBH1_DN / GPIO_B[27]
83
USBH1_DP / GPIO_B[26]
VDDUSB
84
85
VDDIO
86
GPIO_B[21] / BCLK
87
GPIO_B[22] / LRCK
88
GPIO_B[23] / MCLK
GPIO_B[24] / DAO
89
90
GPIO_B[25] / DAI
91
VDDI
GPIO_D[15] / UART1CTSn
92
93
GPIO_D[16]
TELECHIPS Inc.
TCC8600-00X-EAR
Type Description – TCC8600
I/O
External Bus Address Bit [16] / SDRAM RAS signal / ALE for NAND Flash
I/O
External Bus Address Bit [17] / CLE for NAND Flash
I/O
External Bus Address Bit [18] / Data I/O Mask 0
I/O
External Bus Address Bit [19] / Data I/O Mask 1
PWR Digital Power for Internal Core (1.8V)
I/O
External Bus Address Bit [20] / Data I/O Mask 1
I/O
External Bus Address Bit [21] / Data I/O Mask 0
PWR Digital Power for I/O (3.3V)
I/O
SDRAM Clock
GND Digital Ground
I/O
SDRAM Clock Enable signal. Active high. / GPIO_B[0]
I/O
Chip select signal for SDRAM, Active low / GPIO_B[1]
I/O
Static Memory Write Enable signal. Active low.
I/O
Static Memory Output Enable signal. Active low.
I/O
External Bus Chip Select [0] / NAND Flash Output Enable [0] / GPIO_B[2]
I/O
External Bus Chip Select [1] / NAND Flash Output Enable [1] / GPIO_B[3]
I/O
External Bus Chip Select [2] / NAND Flash Output Enable [2] / GPIO_B[4]
I/O
External Bus Chip Select [3] / NAND Flash Output Enable [3] / GPIO_B[5]
O
12MHz Crystal Oscillator Output
I
12MHz Crystal Oscillator Input. Voltage must not exceed VDDI (1.95V).
O
32.768kHz Crystal Oscillator Output
I
32.768kHz Crystal Oscillator Input.Voltage must not exceed VDDI (1.95V).
PWR Digital Power for Internal Core (1.8V)
GND Digital Ground
I/O
GPIO_B[6] / Chip select 1 for IDE Interface. Internal pull-up resistor enabled at reset.
I/O
NAND flash WE. Active low. / GPIO_B[7]
I/O
GPIO_B[8] / UART0 TX Data
I/O
GPIO_B[9] / UART0 RX Data
I
Ready information from external device.
PWR Digital Power for I/O (3.3V)
AI
General purpose multi-channel ADC input 4
AI
General purpose multi-channel ADC input 2
AI
General purpose multi-channel ADC input 0
PWR Analog Power for ADC (3.3V)
GND Analog Ground for ADC
GND Analog Ground for PLL
AO
PLL1 filter output. 1200pF capacitor is required.
PWR Analog & Digital Power for PLL1 (1.8V)
PWR Analog & Digital Power for PLL (1.8V)
AO
PLL0 filter output. 350pF capacitor is required.
GND Analog Ground for PLL
I
System Reset. Active low.
I
Mode Setting Input 1. Pull-down for normal operation.
I/O
USB Host Port 0 D- signal / GPIO_B[29]
I/O
USB Host Port 0 D+ signal / GPIO_B[28]
GND Digital Ground
I/O
USB Host Port 1 D- signal / GPIO_B[27]
I/O
USB Host Port 1 D+ signal / GPIO_B[26]
PWR Power for USB I/O (3.3V)
PWR Digital Power for I/O (3.3V)
I/O
I2S Bit Clock / GPIO_B[21] / Boot Mode Bit 0 (BM[0])
I/O
I2S Word Clock / GPIO_B[22] / Boot Mode Bit 1 (BM[1])
I/O
I2S System Clock / GPIO_B[23]
I/O
I2S Digital Audio data Output / GPIO_B[24] / Boot Mode Bit 2 (BM[2])
I/O
I2S Digital Audio data Input / GPIO_B[25]
PWR Digital Power for Internal Core (1.8V)
I/O
GPIO_D[15] / UART1 CTS Input (active low)
I/O
GPIO_D[16] / I2C SDA
127
Doc. No
AS-C-8600X-EA
Rev. No
2.0
Page
11 of 30
www.telechips.com

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