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Summary of Contents for Avnet Spartan-3E
- Page 1 ® ™ Xilinx Spartan -3E Evaluation Kit User Guide...
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Page 2: Table Of Contents
Figure 9 - Default Jumper Placement ............................... 15 Figure 10 - Barrel Power Connector "J5"..............................22 Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 2 of 23 Rev 1.0... - Page 3 Table 14 - USB Interface FPGA Pin-out ..............................20 Table 15 - Header "J1" Pin-out................................. 21 Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 3 of 23 Rev 1.0...
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Page 4: Introduction
— Support for Xilinx Parallel Cable IV — Fly-wire support for and Xilinx or compatible cable Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 4 of 23 Rev 1.0... -
Page 5: Demo Applications
— Provide test message over RS-232 — Source Code Included Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 5 of 23 Rev 1.0... -
Page 6: Ordering Information
ISE BaseX (only available with purchase of the above part number) Table 1 - Ordering Information Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 6 of 23 Rev 1.0... -
Page 7: Hardware
5,508 216K Table 2 - Spartan-3E Attributes by Density Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 7 of 23 Rev 1.0... -
Page 8: Configuration
JTAG Headers (Par-3 & Par-4) Pin-Out Table 4 - Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 8 of 23 Rev 1.0... -
Page 9: Configuring Fpga With Spi Flash (Default)
SPI FLASH device it is recommended that the .BIT file be tested prior to committing it to FLASH. Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 9 of 23 Rev 1.0... -
Page 10: Programming Spi Flash
Section 2.3. When creating the HEX file, be sure to use a BIT which was generated with the startup clock option set for CCLK (typically the default). Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 10 of 23 Rev 1.0... -
Page 11: Avnet Usb Utility
Programming via USB The Avnet USB utility may be used to write data to the SPI Flash device. The Avnet USB utility will accept a HEX file as an input and program it into the SPI Flash. The HEX is actually an ASCII file, so there is a conversion going on in the background which is transparent to the user. -
Page 12: Figure 7 - Select Target Board
A window will pop up when the process completes or if it errors out. Figure 7 - Select Target Board Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 12 of 23 Rev 1.0... -
Page 13: Jumper Settings
JP7 “JTAG Par – IV”” – This is actually a connector. Use this connector when programming the device over JTAG with a ribbon, as used with the Xilinx Parallel IV cable. Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 13 of 23 Rev 1.0... - Page 14 FPGA’s pins in tri-state condition. Note that if HSWAP is enabled, the FPGA will have internal pull-ups on the pins. Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners.
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Page 15: Clocks
2.8 On-board Display (2 Character Alphanumeric LED) Manufacturer: Lite-On Part #: LTP-3786E-03 Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 15 of 23 Rev 1.0... -
Page 16: Dip & Push-Button Switches
SWITCH_PB1 SWITCH_PB2 Table 9 - Push button FPGA Pin-out Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 16 of 23 Rev 1.0... -
Page 17: Leds
JP8 provides write protection for the SPI FLASH device so this shunt must be removed before programming. Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. -
Page 18: Communication (Rs-232, Usb 2.0)
FX2 modes of operation, see the “EZ-USB FX2 Technical Reference Manual” and the FX2 datasheet available on Cypress Semiconductor’s web site (http://www.cypress.com). Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 18 of 23 Rev 1.0... - Page 19 CLKOUT USB_CLKOUT P128 Clock output from USB Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 19 of 23 Rev 1.0...
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Page 20: Table 14 - Usb Interface Fpga Pin-Out
JP3, PIN17 Table 14 - USB Interface FPGA Pin-out Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 20 of 23 Rev 1.0... -
Page 21: I/O Connectors
Ground Ground Table 15 - Header "J1" Pin-out Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 21 of 23 Rev 1.0... -
Page 22: Power
(such as Hyperterm) may be used to view the output at 9600, 8, N, 1. Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. -
Page 23: List Of Partners
4.0 List of Partners Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners. Avnet Electronics Marketing 23 of 23 Rev 1.0 06/14/2006 Released Literature # ADS-005604...
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