Mainboard Switchpack - Compaq AlphaPC 264DP Technical Reference Manual

AlphaPC 264DP Mainboard Configuration Switches
Figure 2–3 Mainboard Switchpack 2
Off
fsb 1
coa 2
cob 3
mdb 4
sp0
5
sp1
6
sp2
7
pby
8
Figure 2–4 Mainboard Switchpack 3
SW3
Off
cn7
1
cn6
2
cn5
3
cn4
4
cn3
5
cn2
6
spr
7
flash_wr
8
System Configuration and Connectors
2–6
Note: Switch defaults are in bold.
SW2
On
FSB:
Memory Timing:
Mini-Debugger:
21272 Speed:
AlphaBIOS Password Bypass:
Note: Switch defaults are in bold.
Reserved:
On
Reserved:
Flash Write Protect:
Off Normal boot
On Fail-Safe Booter
These switches must be kept at Off - Off.
Off Normal SROM flow
On SROM jumps to Mini-Debugger
MHz sp2 sp1 sp0
83.3 Off On On
Note: All other combinations are reserved.
This must be kept at 83.3 MHz.
Off Normal operation
On Bypass AlphaBIOS password
Note: The switches must remain as follows:
cn7 cn6 cn5 cn4 cn3 cn2
Off Off Off On Off Off
These switches map to the CSC register in the Cchip.
They represent the following bits:
cn7 For firmware use
cn6 sysDC fill delay (SFD)
sysDC extract delay (SED)
cn5,4
cn3 CPU1 clock forward preset
cn2 CPU0 clock forward preset
Refer to the 21272 Specification for more information.
This switch must be kept Off.
Off Write enable flash ROM
On Write disable flash ROM
12 February 1999 – Subject To Change