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AlphaPC 264DP
Technical Reference Manual
Order Number: EC–RB0DA–TE
Revision/Update Information:
This is a new document.
Preliminary
Compaq Computer Corporation

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Summary of Contents for Compaq AlphaPC 264DP

  • Page 1 AlphaPC 264DP Technical Reference Manual Order Number: EC–RB0DA–TE Revision/Update Information: This is a new document. Preliminary Compaq Computer Corporation...
  • Page 2 ©1999 Digital Equipment Corporation. All rights reserved. Printed in U.S.A. COMPAQ, the Compaq logo, the Digital logo, and DIGITAL Registered in U.S. Patent and Trademark Office. AlphaPC, DECchip, and Tru64 are trademarks of Compaq Computer Corporation. Intel is a registered trademark of Intel Corporation.
  • Page 3 AlphaPC 264DP Daughtercard Configuration Switches ....AlphaPC 264DP Mainboard Connector Pinouts ......
  • Page 4 AlphaPC 264DP Hole and Connector Specifications ..... . AlphaPC 264DP Daughtercard Hole Specification ......
  • Page 5 4.6.1.1 Southbridge Chip ......... . 4.6.1.2 PCI0 Expansion Slots .
  • Page 6: Table Of Contents

    4–5 AlphaPC 264DP Power Distribution ........
  • Page 7 Power Supply DC Current Requirements ....... 3–2 AlphaPC 264DP Environmental Requirements......4–1 IDSEL Assignments for PCI Devices .
  • Page 9 Scope This manual describes the features, configuration, functional operation, and inter- faces of the AlphaPC 264DP. This manual does not include specific bus specifica- tions (for example, PCI or ISA buses). Additional information is available in the AlphaPC 264DP schematics, program source files, and the appropriate vendor and IEEE specifications.
  • Page 10 Manual Organization This manual includes the following chapters, an appendix, and an index. Chapter 1, AlphaPC 264DP Introduction, is an overview of the AlphaPC 264DP, • including its components, features, and uses. Chapter 2, System Configuration and Connectors, describes the user-environ- •...
  • Page 11 Binary Multiples • The abbreviations K, M, and G (kilo, mega, and giga) represent binary multiples and have the following values: (1024) (1,048,576) (1,073,741,824) For example: = 2 × 2 = 2 kilobytes bytes = 4 megabytes = 4 × 2 bytes = 8 ×...
  • Page 12 Term Words Bytes Bits Other Quadword 2 Longwords Octaword 2 Quadwords Hexword 2 Octawords Note Notes emphasize particularly important information. Numbering All numbers are decimal or hexadecimal unless otherwise indicated. The prefix 0x indicates a hexadecimal number. For example, 19 is decimal, but 0x19 and 0x19A are hexadecimal (also see Addresses).
  • Page 13 Signal Names All signal names are printed in boldface type. Signal names that originate in an industry-standard specification, such as PCI or IDE, are printed in the case as found in the specification (usually uppercase). Active-high signals are indicated by the _h suffix.
  • Page 14 – An occurrence specified as UNPREDICTABLE may or may not happen based on an arbitrary choice function. The choice function is subject to the same constraints as are UNPREDICTABLE results and must not con- stitute a security hole. Specifically, UNPREDICTABLE results must not depend upon, or be a function of, the contents of memory locations or registers that are inacces- sible to the current process in the current access mode.
  • Page 15 System Components and Features AlphaPC 264DP Introduction This chapter provides an overview of the AlphaPC 264DP system, including its com- ponents, features, and uses. The AlphaPC 264DP system consists of an AlphaPC 264DP mainboard (main- board) and one or two AlphaPC 264DP daughtercards (daughtercards). The daugh- tercard consists of the 21264 microprocessor, L2 cache, reset field programmable gate array (reset FPGA), and power converters for 2.2 volts and 1.5 volts.
  • Page 16: Alphapc 264Dp Functional Block Diagram

    1 1.1.1 Memory Subsystem The DRAM memory subsystem on the AlphaPC 264DP consists of sixteen 200-pin buffered DIMM slots, which are organized as four arrays of memory. The 21272 core logic chipset (21272) supports two 256-bit memory buses (288-bit including ECC) with two arrays on each bus.
  • Page 17 The Pchip provides an interface to the peripheral component interconnect (PCI). One or two Pchips can be used in a system configuration. Two Pchips can be used to provide two independent 64-bit PCI buses. AlphaPC 264DP uses two Pchips to support two 64-bit PCI buses running at 33 MHz.
  • Page 18: L2 Cache Size

    The external level 2 (L2) cache subsystem on the daughtercard supports 2MB or 4MB cache sizes using a 128-bit data bus. The AlphaPC 264DP supports L2 cache using the synchronous SRAM (SSRAM) sizes shown in Table 1–1. Nine SSRAMs are required per daughtercard for 4MB L2 cache and five SSRAMs are required per daughtercard for 2MB L2 cache.
  • Page 19 The integrated drive electronics (IDE) provides an additional expansion bus, with one connector on the mainboard. Only CD-ROMs with an IDE cable length of 12 inches or less are sup- Note: ported. 12 February 1999 – Subject To Change AlphaPC 264DP Introduction 1–5...
  • Page 21 System Configuration and Connectors 2.1 Board Layouts and Components The AlphaPC 264DP uses switches to implement variations in clock frequency (21272 and 21264) and L2 cache configuration. Note that the switches for the 21264 speed and L2 cache configuration are on the daughtercard. The switches for the 21272 speed are on the mainboard.
  • Page 22: Alphapc 264Dp Mainboard Switch/Connector/Component Location

    Board Layouts and Components Figure 2–1 AlphaPC 264DP Mainboard Switch/Connector/Component Location indicates pin 1. indicates switch 1. 12 February 1999 – Subject To Change System Configuration and Connectors 2–2...
  • Page 23: Alphapc 264Dp Mainboard Switch/Connector/Component List

    Board Layouts and Components Table 2–1 describes AlphaPC 264DP mainboard components. Table 2–1 AlphaPC 264DP Mainboard Switch/Connector/Component List Item No. Description Item No. Description RTC battery (CR2032) IDE bus connector J1, J5, J6, J9 Memory connectors ISA bus connector J11, J13, J14,...
  • Page 24: Alphapc 264Dp Daughtercard Switch/Connector/Component

    Board Layouts and Components Figure 2–2 shows the AlphaPC 264DP daughtercard and its components, and Table 2–2 describes these components. Figure 2–2 AlphaPC 264DP Daughtercard Switch/Connector/Component Location Side 1–Component Side indicates pin 1. indicates switch 1. Side 2 U104 U102...
  • Page 25: Alphapc 264Dp Daughtercard Switch/Connector/Component List

    1489 mic29302 3.3-V to 1.5-V regulator 1488 2.2 AlphaPC 264DP Mainboard Configuration Switches The AlphaPC 264DP mainboard has two sets of programmable switches located at SW2 and SW3, as shown in Figure 2–1. These switches set the hardware configuration. Note: There is no switchpack SW1 on production mainboards.
  • Page 26: Mainboard Switchpack

    AlphaPC 264DP Mainboard Configuration Switches Figure 2–3 Mainboard Switchpack 2 Note: Switch defaults are in bold. FSB: Normal boot Fail-Safe Booter Memory Timing: These switches must be kept at Off - Off. Mini-Debugger: Normal SROM flow SROM jumps to Mini-Debugger 21272 Speed: 83.3...
  • Page 27 AlphaPC 264DP Mainboard Configuration Switches 2.2.1 Fail-Safe Booter The Fail-Safe Booter (FSB) utility provides an emergency recovery mechanism when the primary firmware image contained in flash memory has been corrupted. When flash memory has been corrupted, and no image can be loaded safely from the flash ROM, you can run the FSB and boot another image from a diskette that is capable of reprogramming the flash ROM.
  • Page 28: Daughtercard Configuration Switches

    ROM is allowed, that is, switch 8 (flash_wr) of SW3 on the mainboard is off (see Figure 2–4). The AlphaPC 264DP will not function if switch 8 is in the on position. Note: 2.2.6 21272 Speed The speed of the 21272 core logic chipset is determined by switches 5–7 of SW2.
  • Page 29: Daughtercard Connector Pinouts (J18, J23)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4 AlphaPC 264DP Mainboard Connector Pinouts This section lists the pinouts of the mainboard connectors (see Table 2–3 through Table 2–21). See Figure 2–1 for connector locations. 2.4.1 Daughtercard Connector Pinouts Table 2–3 shows the daughtercard connector pinouts.
  • Page 30 AlphaPC 264DP Mainboard Connector Pinouts Table 2–3 Daughtercard Connector Pinouts (J18, J23) (Continued) Signal Signal Signal Pin Signal 109 sysdata15_l 110 sysdata19_l 111 sysdatainclk2_l 112 sysdata20_l 113 sysdata22_l 114 sysdata23_l 115 pllbypass_h 116 srom_en_l 117 sclk 118 syscheck2_l 119 sysdata24_l...
  • Page 31: Pci Bus Connector Pinouts (J35, J40-J42, J44, J46)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.2 PCI Bus Connector Pinouts Table 2–4 shows the PCI bus connector pinouts. Table 2–4 PCI Bus Connector Pinouts (J35, J40–J42, J44, J46) Signal Signal Signal Signal TRST# +12V INTA INTC — — — RST# GNT# —...
  • Page 32 AlphaPC 264DP Mainboard Connector Pinouts Table 2–4 PCI Bus Connector Pinouts (J35, J40–J42, J44, J46) (Continued) Signal Signal Signal Signal C/BE#[7] C/BE#[5] PAR64 D[62] D[60] D[58] D[56] D[54] D[52] D[50] D[48] D[46] D[44] D[42] D[40] D[38] D[36] D[34] D[32] —...
  • Page 33: Isa Expansion Bus Connector Pinouts (J47)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.3 ISA Expansion Bus Connector Pinouts Table 2–5 shows the ISA expansion bus connector pinouts. Table 2–5 ISA Expansion Bus Connector Pinouts (J47) Signal Signal Signal Signal IOCHCK# RSTDRV IRQ9 –5V DRQ2 –12V ZEROWS# +12V...
  • Page 34: Ide Drive Bus Connector Pinouts (J45)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.4 IDE Drive Bus Connector Pinouts Table 2–6 shows the IDE drive bus connector pinouts. Table 2–6 IDE Drive Bus Connector Pinouts (J45) Signal Signal Signal Signal DRST IDE_D7 IDE_D8 IDE_D6 IDE_D9 IDE_D5 IDE_D10 IDE_D4...
  • Page 35: Sdram Dimm Connector Pinouts (J1, J5, J6, J9, J11, J13, J14, J16, J25-J32)

    AlphaPC 264DP Mainboard Connector Pinouts Table 2–7 Ultra SCSI Bus Connector Pinouts (J34, J38) (Continued) Signal Signal Signal Signal reset scd8 scd9 scd10 scd11 2.4.6 SDRAM DIMM Connector Pinouts Table 2–8 shows the SDRAM DIMM connector pinouts. Table 2–8 SDRAM DIMM Connector Pinouts (J1, J5, J6, J9, J11, J13, J14, J16, J25–J32)
  • Page 36 AlphaPC 264DP Mainboard Connector Pinouts Table 2–8 SDRAM DIMM Connector Pinouts (J1, J5, J6, J9, J11, J13, J14, J16, J25–J32) (Continued) Signal Signal Signal Signal rege dq71 dq70 dq69 dq68 dq59 dq58 dq57 dq56 dq55 dq54 dq53 dq52 dq47 dq46...
  • Page 37: Diskette (Floppy) Drive Bus Connector Pinouts (J43)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.7 Diskette (Floppy) Drive Bus Connector Pinouts Table 2–9 shows the diskette (floppy) drive bus connector pinouts. Table 2–9 Diskette (Floppy) Drive Bus Connector Pinouts (J43) Signal Signal Signal Signal DRVDEN0 DRVDEN1 INDEX MTR0 MTR1...
  • Page 38: Com1/Com2 Serial Line Connector Pinouts (J19)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.9 COM1/COM2 Serial Line Connector Pinouts Table 2–11 shows the COM1/COM2 serial line connector pinouts. Table 2–11 COM1/COM2 Serial Line Connector Pinouts (J19) COM1 Pin COM2 Pin (Top) COM1 Signal (Bottom) COM2 Signal DCD1 DCD2...
  • Page 39: Fan Box Power Connector Pinouts (J2, J15, J22, J24)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.11 +3-V Power Connector Pinouts Table 2–13 shows the +3-V power connector pinouts. Table 2–13 +3-V Power Connector Pinouts (J3) Voltage Voltage Voltage Voltage vdd_3v vdd_3v vdd_3v vdd_3v vdd_3v vdd_3v vdd_3v vdd_3v vdd_3v vdd_3v +12 V dc...
  • Page 40: Speaker Connector Pinouts (J39)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.14 Speaker Connector Pinouts Table 2–16 shows the speaker connector pinouts. Table 2–16 Speaker Connector Pinouts (J39) Signal Description spkr Speaker input vdd_5v — — vdd_5v — 2.4.15 Halt Button Connector Pinouts Table 2–17 shows the halt button connector pinouts.
  • Page 41: Ultra Scsi Hard Drive Led Connector Pinouts (J10)

    AlphaPC 264DP Mainboard Connector Pinouts 2.4.18 Ultra SCSI Hard Drive LED Connector Pinouts Table 2–20 shows the ultra SCSI hard drive LED connector pinouts. Table 2–20 Ultra SCSI Hard Drive LED Connector Pinouts (J10) Signal Description scsi_hd_act Hard drive active vdd_5v —...
  • Page 42: Microprocessor Fan Power Connector Pinouts (J1)

    AlphaPC 264DP Daughtercard Connector Pinouts 2.5 AlphaPC 264DP Daughtercard Connector Pinouts This section lists the pinouts of the AlphaPC 264DP daughtercard connectors (see Table 2–22 through Table 2–25). See Figure 2–2 for connector locations. 2.5.1 Microprocessor Fan Power Connector Pinouts Table 2–22 shows the microprocessor fan power connector pinouts.
  • Page 43 AlphaPC 264DP Daughtercard Connector Pinouts Table 2–24 Daughtercard Connector Pinouts (J3) (Continued) Signal Signal Signal Pin Signal cpu_slot sysdata26_l sysdata25_l sysdatainclk3_l sysdata28_l sysdata30_l syscheck3_l clkfwdreset_h irq_0_h irq_2_h irq_4_h 2v_pwrgood_h tsu_speed0 tsu_speed1 clk_rdy_h tsu_speed2 sysfillvalid_l sysaddin13_l sysaddin8_l sysaddin9_l sysaddinclk_l sysaddout13_l sysaddin7_l...
  • Page 44: Input Power Connector Pinouts (J4)

    180 vdd_2v_term 212 pecl_clkin_h 213 pecl_clkin_l 214 Gnd 215 frameclk_h 216 frameclk_l 2.5.4 AlphaPC 264DP Daughtercard Input Power Connector Pinouts Table 2–25 shows the input power connector pinouts. Table 2–25 Input Power Connector Pinouts (J4) Pin Voltage Pin Voltage Pin Voltage...
  • Page 45: Power Supply Dc Current Requirements

    Power Requirements Power and Environmental Requirements This chapter describes the AlphaPC 264DP power and environmental requirements and physical board parameters, for both the mainboard and the daughtercard. 3.1 Power Requirements The mainboard has a maximum total power dissipation of 215 W, excluding any disk drives.
  • Page 46: Alphapc 264Dp Environmental Requirements

    The daughtercard is designed to run efficiently by using only this fan. Additional fans may be necessary depending upon cabinetry and the requirements of plug-in cards. The AlphaPC 264DP mainboard and daughtercard are specified to run within the environment listed in Table 3–2. Table 3–2 AlphaPC 264DP Environmental Requirements...
  • Page 47: Alphapc 264Dp Mainboard Hole Specifications

    AlphaPC 264DP Hole and Connector Specifications 3.4 AlphaPC 264DP Hole and Connector Specifications Figure 3–1 shows the AlphaPC 264DP mainboard’s hole specifications. Figure 3–1 AlphaPC 264DP Mainboard Hole Specifications 180.98 mm (7.125 in.) 160.02 mm (6.300 in.) 2X 6.35 mm (.250 in.) 140.21 mm (5.520 in.)
  • Page 48: Alphapc 264Dp Mainboard Connector Specifications

    AlphaPC 264DP Hole and Connector Specifications Figure 3–2 shows the mainboard’s connector specifications. Figure 3–2 AlphaPC 264DP Mainboard Connector Specifications 321.93 mm (12.675 in.) 148.59 mm (5.850 in.) 306.07 mm (12.050 in.) 2X 120.64 mm (4.750 in.) 6X 290.25 mm (11.427 in.) 103.53 mm (4.076 in.)
  • Page 49: Alphapc 264Dp Mainboard I/O Connector Specifications

    AlphaPC 264DP Hole and Connector Specifications Figure 3–3 shows the top and side views of the mainboard’s I/O connectors. Figure 3–3 AlphaPC 264DP Mainboard I/O Connector Specifications Top View Side View 13.97 mm (.550 in.) MOUSE 2.97 mm (.117 in.) 261.74 mm (10.305 in.)
  • Page 50: Alphapc 264Dp Daughtercard Hole Specification-Component Side

    AlphaPC 264DP Daughtercard Hole Specification 3.5 AlphaPC 264DP Daughtercard Hole Specification Figure 3–4 shows the hole specifications for the daughtercard. Figure 3–4 AlphaPC 264DP Daughtercard Hole Specification—Component Side 304.80 mm (12.000 in.) 5.08 mm 3× φ 3.99 mm (.2 in.) (.157 in.)
  • Page 51 21272 Core Logic Chipset Introduction Functional Description This chapter describes the functional operation of the AlphaPC 264DP. It introduces the 21272 core logic chipset (21272) and describes its implementation with the 21264 microprocessors and their supporting memory and I/O devices.
  • Page 52 • Supports interrupts and flash ROM via the TIGbus On the AlphaPC 264DP, the Cchip controls four arrays of SDRAM DIMMs. The DIMMs can range in size from 32MB to 256MB. Note that there are two separate 256-bit paths and four arrays (two on each bus) on the AlphaPC 264DP.
  • Page 53: Memory Datapath

    The Cchip supports up to four arrays of SDRAM (Array 0–3), where each array con- sists of four DIMMs. The AlphaPC 264DP has four 256-bit arrays. Memory is accessed at 256 bits; however, because the AlphaPC 264DP must use ECC, 288 bits are required. The maximum memory that is supported on the AlphaPC 264DP is 4GB using 256MB DIMMs (16 total).
  • Page 54 The Dchips provide the data path from the 21264 to main memory. Although a mini- mum of two chips are required for the memory interface using the 21272, eight chips are used for the interface on the AlphaPC 264DP. The chips contain the CPU, Pchip, and memory interface data paths, which includes DMA and PIO queues.
  • Page 55 Dchip Functional Overview 4.3.2 Memdata Bus There are two memdata buses, each of which is a 256-bit, bidirectional bus between the Dchips and the memory arrays. Memdata0 connects to arrays 0 and 2; memdata1 connects to arrays 1 and 3 (see Figure 4–1). Each Dchip sends/receives four bytes of data that it has accumulated to/from the memory arrays.
  • Page 56 2.1. The Pchip contains all control functions of the bridge and some data path functions. Other data path functions reside in the Dchip. Two Pchips are used on the AlphaPC 264DP to provide two separate 64-bit PCI buses. The Pchip provides all controls and interfaces to the PCI and contains the following components and functions: •...
  • Page 57 Clock Subsystem 4.5 Clock Subsystem The system clocks can be divided into five areas: • Input clocks required by the CPU/system • Clock forwarding to/from the system logic • Memory system • PCI system • Miscellaneous oscillators and clocks required for the peripheral interfaces and functions 4.5.1 CPU and System Clock Generation There is a crystal for 32.768 KHz, and other clocks are provided through a PC clock...
  • Page 58: Clock Distribution

    83 MHz 4.6 PCI Devices The AlphaPC 264DP uses the PCI bus as the main I/O bus for the majority of periph- eral functions. The board implements the ISA bus as an expansion bus for system support functions and peripheral devices.
  • Page 59 Decoding and control for utility bus peripheral devices • Speaker driver • PCI arbitration control (disabled on AlphaPC 264DP). Refer to the Cypress hyperCache chipset databook for additional information. 4.6.1.2 PCI0 Expansion Slots Three PCI bus expansion slots are available on PCI0, with support for 64-bit devices.
  • Page 60: Pci0 Arbitration Scheme

    PCI Devices 4.6.1.3 PCI SCSI Interface The Adaptec AIC7895 is used as a bridge from PCI to SCSI. The AIC7895 has two ultra SCSI ports and is packaged in a 208-pin plastic quad flat pack (PQFP). Both ports support ultrawide SCSI devices. Note that parity must be disabled for the SRAM that attaches to the AIC7895.
  • Page 61 The 48 interrupt inputs (34 enabled, 14 reserved) imple- mented on the AlphaPC 264DP are polled eight at a time by selecting a byte using tigadr[2:0] and asserting TigIntOE to allow the selected byte to be driven on the TIGbus.
  • Page 62: Interrupt Request Register

    PCI and System Interrupts Figure 4–4 Interrupt Request Register 62 61 60 55 54 53 52 48 47 44 43 40 39 Reserved Reserved C0 D0 C1 D1 C2 D2 Reserved PCI1_INT x 2 PCI1_INT x 1 PCI1_INT x 0 I2C_IOINT_L PCI0_NMI PCI0_SMI_INT...
  • Page 63: Isa Interrupts

    16-bit ISA IRQ7 8-bit ISA (parallel port) IRQ15 The AlphaPC 264DP timer interrupt is generated by the real-time clock by means of the square-wave output of the southbridge chip, which routes the interrupt directly to the Cchip. 4.8 ISA Devices The following section describes the AlphaPC 264DP ISA bus implementation with peripheral devices and connectors.
  • Page 64 DC Power Distribution 4.8.1 Super I/O Controller The AlphaPC 264DP uses the SMC FDC37C669 as the combination controller chip (see Table 2–1 and Figure 2–1). It is packaged in a 100-pin PQFP configuration. The chip provides the following ISA peripheral functions: •...
  • Page 65 DC Power Distribution Figure 4–5 shows that the +12 V dc, −12 V dc, +5 V dc, and −5 V dc are supplied to ISA connector J47. The +12 V dc and −12 V dc are supplied to the PCI connectors J35, J40–42, J44, and J46, and to the two daughtercard connectors J18 and J23.
  • Page 66: Alphapc 264Dp Power Distribution

    Reset and Initialization Figure 4–5 AlphaPC 264DP Power Distribution −12 V +5 V MISC 1, 3, 5, 7, 10, 12, 14 −5 V Spkr Integrated Comm. ISA Conn. PCI32 Conn. Circuits/Clocks Port Fans Conn. +12 V +3.3 V 1, 3, 5, 7, 9, 11, 14, +2.0 V...
  • Page 67 4.11.2 Flash ROM Code The AlphaPC 264DP includes an industry-standard, 2MB flash ROM – AMD AM29F016. 4.11.3 Operating Systems The AlphaPC 264DP is designed to run Windows NT and Tru64 UNIX. 12 February 1999 – Subject To Change Functional Description 4–17...
  • Page 69: Alphapc 264Dp Memory Subsystem

    System Memory and Address Mapping 5.1 Memory Subsystem The DRAM memory subsystem on the AlphaPC 264DP consists of sixteen 200-pin buffered DIMM slots, which are organized as four arrays of memory. The 21272 chipset supports two 256-bit memory buses (288-bit including ECC) with two arrays on each bus (see Figure 5–1).
  • Page 70: Alphapc 264Dp Dimm Connectors

    Configuring SDRAM Memory 5.2 Configuring SDRAM Memory For the memory system in the AlphaPC 264DP, one to four arrays may be used, fol- lowing the configuration rules. Configuration Rules • Each array must be fully populated with DIMMs of the same size and type.
  • Page 71: Alphapc 264Dp Sdram Memory Configurations

    Any combinations of DIMMs that meet the configuration rules are supported by the 21272 chipset. For a list of vendors who supply components and accessories for the AlphaPC 264DP, see Appendix A. Table 5–1 AlphaPC 264DP SDRAM Memory Configurations Total Memory Array 0 Array 1...
  • Page 72: 5.3.2 Tigbus Address Mapping

    System Address Mapping 5.3 System Address Mapping This section describes the mapping of the processor physical address space into memory and I/O space addresses. It also includes the translations of the processor- initiated address into a PCI address, and PCI-initiated addresses into physical mem- ory addresses.
  • Page 73 System Address Mapping Table 5–2 TIGbus Address Mapping (Continued) capbus Physical [23:21] Address Access Function Comment 801 28xx xxx0 RO Gpen_4 Con_bit[7:0] General configuration register. See Figure 5–3. 801 30xx x000 RO Gpen_5 CPU0_config[7:0] CPU0 configuration register. See Figure 5–4. 801 30xx x040 RW Flash write enable[0] Writing a 1 to this location enables...
  • Page 74: Gpen4 Register

    System Address Mapping The Gpen4 register, shown in Figure 5–3, reflects the settings of the mainboard’s switchpack 2 (see Figure 2–3). Figure 5–3 Gpen4 Register 7 6 5 4 3 2 1 0 Reserved Mini-Debugger 21272 sp[2:0] AlphaBIOS password bypass The Gpen5 register, shown in Figure 5–4, shows the CPU speed and Bcache config- uration (set by onboard resistors) on the daughtercard containing CPU0.
  • Page 75 Support, Products, and Documentation A.1 Customer Support Alpha OEM provides the following web page resources for customer support. Description http://www.digital.com/alphaoem Contains the following links: • Development tools, code examples, Developers’ Area: driver developers’ information, and technical white papers • Motherboard Products: Motherboard details and performance information •...
  • Page 76 Technical Information Then click on Alpha OEM Hardware Compatibility List A.2.2 Power Supply A power supply, suitable for use with the AlphaPC 264DP (+3.3 V, +5 V, –5 V, +12 V, –12 V), is available from: Antec, Inc. 2859 Bayview Drive Fremont, CA 94538 Phone: 510–770–1200, ext.
  • Page 77 Alpha Products A.3 Alpha Products To order the AlphaPC 264DP mainboard, contact your local sales office. The follow- ing tables list some of the Alpha products available. Note: The following products and order numbers might have been revised. For the latest versions, contact your local sales office.
  • Page 78 Alpha Documentation A.4 Alpha Documentation The following table lists some of the available Alpha documentation. You can down- load Alpha documentation from the Alpha OEM World Wide Web Internet site: http://www.digital.com/alphaoem Click on , then click on Technical Information Documentation Library Title Order Number Alpha Architecture Reference Manual...
  • Page 79 Index Connector specifications mainboard, 3-4 Abbreviations, x Connectors daughtercard, 2-4, 2-5 Address decode, 4-2 mainboard, 2-2, 2-3 Address mapping pinouts system, 5-4 daughtercard, 2-22 to 2-24 TIGbus, 5-4 mainboard, 2-9 to 2-21 Alpha products, A-3 Controller combination, 1-5, 4-14 AlphaPC, 2-9 memory, 4-3 super I/O, 1-5, 4-14 Conventions...
  • Page 80 Daughtercard configuration switches, 2-8 to 2-9 connector pinouts, 2-22 to 2-24 I/O specifications dc-to-dc converter, 1-4 mainboard, 3-5 dimensions, 3-2 IDE interface, 1-5 environmental requirements, 3-2 hole specifications, 3-6 Interrupt request register, 4-12 level 2 cache, 1-4 Interrupts, 4-11 overview, 1-3 power requirements, 3-1 INTnn, xi switch/connector/component list, 2-5...
  • Page 81 Operating systems, 4-17 SCSI interface, 1-5, 4-10 Ordering products and documentation, A-3 Southbridge, 1-5, 4-9 Super I/O controller, 1-5, 4-14 Support technical, A-1 Padbus, 4-5 Switches, See Configuration switches Password bypass, 2-7 Sysdata bus, 4-4 Pchip, 1-3 System address mapping, 5-4 functional overview, 4-6 System interrupts, 4-11 arbitration, 4-10...

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