Clocks; Reset - Epson S5U13515P00C100 User Manual

For s2d13515 display controller

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Chapter 4 Technical Description

4.2 Clocks

The clock for the S2D13515 Display Controller is provided by a 20MHz crystal connected to the OSCI and OSCO

pins.

Additionally, the S5U13515P00C100 evaluation board can also use an oscillator if the DIP14 footprint is populated.

If populated, the oscillator is connected to the CLKI input clock of the S2D13515 Display controller.

Note

For details on the S2D13515 clock structure, refer to the S2D13515 Hardware Functional Specification, document

number X83A-A-001-xx.

The S2D13515 Display Controller on the S5U13515P00C100 evaluation board can be reset using a push-button

switch (SW2), or via an active low reset signal from the host development platform (pin 30 on the H4 connector).

Figure 4-1: Reset Switch (SW2) Location

EPSON

S5U13515P00C100 Evaluation Board User Manual (Rev 1.1)

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