SMC Networks SMC91C95 Product Manual page 47

I/O SPACE - BANK0
OFFSET
A MEMORY CONFIGURATION
HIGH
BYTE
0
LOW
BYTE
0
MEMORY RESERVED
Programming this value allows the host CPU to
reserve memory to be used later for transmit,
limiting the amount of memory that receive packets
can use up.
When programmed for zero, the memory allocation
between transmit and receive is completely
dynamic.
When programmed for a non-zero value, the
allocation is dynamic if the free memory exceeds
the programmed value, while receive allocation
requests are denied if the free memory is less or
equal to the programmed value.
This register defaults to zero upon reset. It is not
affected by the RESET MMU command.
DEVICE
FEAST
SMC91C90
FUTURE
FUTURE
FUTURE
NAME
REGISTER
0 1 1
MEMORY RESERVED FOR TRANSMIT (IN BYTES * 256 * M)
0 0 0
FOR TRANSMIT -
bit 11 bit 10 bit 9
0 1
0 0
0 1
1 0
1 0
47
TYPE
Lower Byte -
READ/WRITE
Upper Byte -
READ ONLY
MEMORY SIZE MULTIPLIER
0 0
0 0
The value written to the MCR is a reserved
memory space IN ADDITION TO ANY MEMORY
CURRENTLY IN USE. If the memory allocated for
transmit plus the reserved space for transmit is
required to be constant (rather than grow with
transmit allocations) the CPU should update the
value of this register after allocating or releasing
memory.
The contents of MIR as well as the low byte of
MCR are specified in 256 * M bytes. The multiplier
M is determined by bits 11,10, and 9 as follows.
Bits 11,10 and 9 are read only bits used by the
software driver to transparently run on different
controllers of the SMC9000 family.
M MAX MEMORY SIZE
0 2 256*256*2=128k
1 1 256*256*1=64k
1 4
0 8
1 16
SYMBOL
MCR
1 1
0 0
256k
512k
1M