SMC Networks SMC91C95 Product Manual page 119

Isa/pcmcia full duplex single-chip ethernet and modem controller with ram
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A0-15
AEN, nSBHE
t15
nIOCS16
t3
nIORD
D0-15
t3
Address, nSBHE, AEN Setup to Control Active
t4
Address, nSBHE, AEN Hold after Control
Inactive
t5
nIORD Low to Valid Data
t6
nIORD High to Data Floating
t15
A4-A15, AEN Low, BALE High to nIOCS16
Low
t20
Cycle time*
BALE Tied High
IOCHRDY not used - t20 has to be met
*Note: The cycle time is defined only for consecutive accesses to the Data Register. These values assume
that IOCHRDY is not used.
FIGURE 27 - ISA CONSECUTIVE READ CYCLES
VALID ADDRESS
t4
t20
t6
t5
VALID DATA
OUT
Parameter
119
VALID ADDRESS
Z
min
typ
25
20
185
Z
VALID DATA
OUT
max
units
ns
ns
40
ns
30
ns
25
ns
ns

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