Clock Setup - Agilent Technologies N4906B Serial BERT User Manual

Clock Setup

Setting up the Error Detector
Clock Setup
To measure the Bit Error Rate with the error detector, the bit rate of
the data stream must be known. Depending on the options the
instrument is delivered with, you could use either an external clock
source for the error detector (for example, the clock from the pattern
generator), or extract the clock signal from the incoming data (CDR
mode).
NOT E
The following sections describe how CDR mode works and are thus
only valid for your instrument if it is equipped with CDR mode. See
"Introduction to the Serial BERT" on page 6 for a description of the
available options for your instrument.
CDR mode does not work for all kinds of data patterns. For example, if
the device under test sends only blocks of ones and zeros, there are no
transitions in the data stream and the Serial BERT cannot recover the
clock.
Also, if you are testing bursts, there are some special considerations
for setting up CDR. See the following sections for details.
How does Clock Data Recovery Work?
In CDR mode, the CDR has to recover the clock from the incoming
data. To do this, the hardware has to decide whether the voltage at the
input connector is a logical '1' or '0' and then recover the clock from
the detected transitions.
Because the regular threshold voltage is not only used to determine
the optimum sampling for the data, but also to perform measurements
such as eye diagram measurements, it is not possible to use it for the
clock recovery.
For this reason, the clock recovery circuitry has it's own comparator
for the incoming data. This comparator also needs to know the
threshold voltage (0/1 decision threshold).
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Agilent N4906B Serial BERT, User's Guide, October 2005