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9.13. SPI
The Serial Peripheral Interface Bus (SPI bus) is a synchronous serial data link standard. Devices communicate in
master/slave mode, where the master device initiates the data frame. Multiple slave devices are allowed with
individual slave select (chip select) lines. SPI is sometimes called a four-wire serial bus, contrasting with three, two
and one-wire serial buses.
The COMe-bDV7 module contains two SPI chips (primary SPI flash and secondary SPI flash) and can use an external
SPI chip on the carrier board for booting.
9.13.1. SPI boot
The COMe-bDV7 supports boot from a 16 MB 3V serial external SPI Flash. To configure the SPI Flash to be used for
booting, placing jumpers on pin A34 (BIOS_DIS0#) and pin B88 (BIOS_DIS1#) as follows:
Table 17: SPI Boot Configuration
Configuration
BIOS_DIS0#
1
Open
2
GND
3
Open
4
GND
BIOS does not support being split between two chips. Booting takes place either from the
module SPI or from the carrier board SPI.
If the Firmware Update Configuration is set to Enabled (Advanced>Firmware Update Configuration>Enabled), it is
possible to flash in the BIOS setup and override the platform configuration on FIA/WM to make changes within the
BIOS. These changes will be implemented in the next cycle. Once the changes have been made the BIOS setting will
automatically be reset to disabled (Advanced>Firmware Update Configuration>Disabled).
Each time changes are to be made within the BIOS setup, the Firmware Update Configuration must be set to enabled
(Advanced>Firmware Update Configuration>Enabled). It is not possible to set the Firmware Update Configuration
permanently to enabled, as this prevents HSIO lane configuration. For more information, see 3.9: SoC High-speed
Interfaces Overview.
After flashing the BIOS set up the Firmware Update Configuration is set to disabled on the
next cycle. For further changes Firmware Update Configuration must be reset to enabled.
NOTE: It is not possible to set the Firmware Update Configuration permanently to enabled,
as this prevents HSIO lane configuration.
To Flash to an SPI chip that is not the boot SPI Flash chip, see Chapter 9.13.3: Using an External SPI Flash.
Table 18: Supported SPI Boot Flash Types for 8-SOIC Package
Size
128 Mb (16 M x8)
128 Mb (16 M x8)
128 Mb (16 M x8)
www.kontron.com
BIOS_DIS1#
Function
Open
Module SPI only
Open
Not supported
GND
Carrier board SPI Only
GND
Not supported
Manufacturer
Micron Technology
ISSI
Winbond
Part Number
MT25QL128ABA1ESE-OSIT
IS25LP128-JBLE
W25Q128JVSIQ
COMe-bDV7 - User Guide, Rev 1.0
Device ID
0xBA18
0x4018
0x6018
// 43
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