Signal Timing Specifications - Advantech IDK-1121WP Series User Manual

3.3

Signal Timing Specifications

This is the signal timing required at the input of the TMDS transmitter. All of the inter-
face signal timing should be satisfied with the following specifications for it's proper
operation.
Table 3.1: TIMING TABLE
ITEM Symbol
Period
DCLK
Frequency
Period
Horizontal Valid
Hsync
Horizontal Blank
Frequency
Period
Vertical Valid
Vsync
Vertical Blank
Frequency
Note1! Hsync period and Hsync width-active should be even number times of
tCLK. If the value is odd number times of tCLK, the display control signal
can be asynchronous. In order to operate this LCM, Hsync, Vsyn, and
DE(data enable) signals should be used.
1.
2.
3.
4.
5.
t
CLK
-
t
HP
t
HV
t
HB
f
H
t
VP
t
VV
t
VB
f
V
The performance of the electro-optical characteristics may be influ-
enced by variance of the vertical refresh rates.
Vsync and Hsync should be keep the above specification.
Hsync Period, Hsync Width, and Horizontal Back Porch should be
any times of of character number(4).
The polarity of Hsync, Vsync is not restricted.
The Max frequency of 1920X1080 resolution is 87.5Mhz.
15
Min Typ Max
11.43 13.89 16.7
60 72 90.39
1024 1088 1120
960 960 960
64 128 160
64 66 83
1090 1100 1251
1080 1080 1080
10 20 80
50 60 75
IDK-1121WP User Manual
Unit Note
ns
MHz 5
t
CLK
t
CLK
K
Hz
t
HP
t
HP
t
HP
Hz